IDT70P256/246L
Low Power 1.8V 8K/4K x 16 Dual-Port Static RAM
Industrial Temperature Range
IDT70P256/246L
Low Power 1.8V 8K/4K x 16 Dual-Port Static RAM
Preliminary
Industrial Temperature Range
PinNames
Left Port
Right Port
Names
Chip Enable (Input)
CE
R/W
OE
L
CE
R
L
R/W
R
Read/Write Enable (Input)
Output Enable (Input)
Address (Input)
L
OE
R
(1)
(1)
A0L - A12L
A0R - A12R
I/O0L - I/O15L
I/O0R - I/O15R
Data Input/Output
Semaphore Enable (Input)
Upper Byte Select (Input)
Lower Byte Select (Input)
Interrupt Flag (Output)
Busy Flag (Output)
SEM
UB
LB
INT
BUSY
L
SEM
UB
LB
INT
BUSY
, IRR
- ODR
SFEN(2)
R
L
R
L
R
L
R
L
R
IRR
0
1
Input Read Register (Input)
Output Drive Register (Output)
Special Function Enable (Input)
Power (1.8V) (Input)
NOTE:
ODR
0
4
1. A12X is a NC for IDT70P246.
2. SFEN is active when either CEL = VIL or CER = VIL.
SFEN is inactive when CEL = CER = VIH.
VDD
Left Port I/O Supply Voltage
(3.0V) (Input)
VDDQL
Right Port I/O Supply Voltage
(3.0V) (Input)
VDDQR
VSS
Ground (0V) (Input)
5699 tbl 01
Truth Table I: Non-Contention Read/Write Control
Inputs(1)
Outputs
R/W
X
X
L
I/O8-15
High-Z
High-Z
DATAIN
High-Z
DATAIN
I/O0-7
High-Z
High-Z
High-Z
DATAIN
DATAIN
High-Z
DATAOUT
DATAOUT
High-Z
Mode
Deselected: Power Down
CE
H
X
L
OE
X
X
X
X
X
L
UB
X
H
L
LB
X
H
H
L
SEM
H
H
Both Bytes Deselected
Write to Upper Byte Only
Write to Lower Byte Only
Write to Both Bytes
H
L
L
H
L
H
L
L
L
H
L
H
H
H
X
L
H
L
H
DATAOUT
High-Z
Read Upper Byte Only
Read Lower Byte Only
Read Both Bytes
L
L
H
L
H
L
L
L
H
DATAOUT
High-Z
X
H
X
X
X
Outputs Disabled
5699 tbl 02
NOTE:
1. A0L — A12L ≠ A0R — A12R
6.42
3