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5CGTFD9E5F31C7N PDF预览

5CGTFD9E5F31C7N

更新时间: 2024-01-05 09:12:27
品牌 Logo 应用领域
英特尔 - INTEL 可编程逻辑
页数 文件大小 规格书
95页 1359K
描述
Field Programmable Gate Array, 301000-Cell, CMOS, PBGA896, ROHS COMPLIANT, FBGA-896

5CGTFD9E5F31C7N 技术参数

是否Rohs认证: 符合生命周期:Active
包装说明:BGA, BGA896,30X30,40Reach Compliance Code:compliant
HTS代码:8542.39.00.01风险等级:5.6
JESD-30 代码:S-PBGA-B896JESD-609代码:e1
长度:31 mm湿度敏感等级:3
输入次数:448逻辑单元数量:301000
输出次数:448端子数量:896
最高工作温度:85 °C最低工作温度:
封装主体材料:PLASTIC/EPOXY封装代码:BGA
封装等效代码:BGA896,30X30,40封装形状:SQUARE
封装形式:GRID ARRAY峰值回流温度(摄氏度):NOT SPECIFIED
电源:1.1,1.2/3.3,2.5 V可编程逻辑类型:FIELD PROGRAMMABLE GATE ARRAY
认证状态:Not Qualified座面最大高度:2 mm
子类别:Field Programmable Gate Arrays最大供电电压:1.13 V
最小供电电压:1.07 V标称供电电压:1.1 V
表面贴装:YES技术:CMOS
温度等级:OTHER端子面层:Tin/Silver/Copper (Sn/Ag/Cu)
端子形式:BALL端子节距:1 mm
端子位置:BOTTOM处于峰值回流温度下的最长时间:NOT SPECIFIED
宽度:31 mmBase Number Matches:1

5CGTFD9E5F31C7N 数据手册

 浏览型号5CGTFD9E5F31C7N的Datasheet PDF文件第89页浏览型号5CGTFD9E5F31C7N的Datasheet PDF文件第90页浏览型号5CGTFD9E5F31C7N的Datasheet PDF文件第91页浏览型号5CGTFD9E5F31C7N的Datasheet PDF文件第92页浏览型号5CGTFD9E5F31C7N的Datasheet PDF文件第93页浏览型号5CGTFD9E5F31C7N的Datasheet PDF文件第95页 
CV-51002  
2015.12.04  
94  
Document Revision History  
Date  
Version  
Changes  
March 2013  
3.2  
Added HPS reset information in the “HPS Specifications” section.  
Added Table 57.  
Updated Table 1, Table 2, Table 17, Table 20, Table 52, and Table 56.  
Updated Figure 18.  
January 2013  
3.1  
3.0  
Updated Table 4, Table 20, and Table 56.  
November 2012  
Updated Table 1, Table 4, Table 5, Table 9, Table 14, Table 16, Table 17, Table 19, Table 20, Table 25, Table  
28, Table 52, Table 55, Table 56, and Table 59.  
Removed table: Transceiver Block Jitter Specifications for Cyclone V GX Devices.  
Added HPS information:  
Added “HPS Specifications” section.  
Added Table 33, Table 34, Table 35, Table 36, Table 37, Table 38, Table 39, Table 40, Table 41, Table 42,  
Table 43, Table 44, Table 45, and Table 46.  
Added Figure 4, Figure 5, Figure 6, Figure 7, Figure 8, Figure 9, Figure 10, Figure 11, Figure 12, Figure 13,  
Figure 14, Figure 15, and Figure 16.  
Updated Table 3.  
June 2012  
2.0  
Updated for the Quartus II software v12.0 release:  
Restructured document.  
Removed “Power Consumption” section.  
Updated Table 1,Table 3, Table 19, Table 20, Table 25, Table 27, Table 28, Table 30, Table 31, Table 34,  
Table 36, Table 37, Table 38, Table 39, Table 41, Table 43, and Table 46.  
Added Table 22, Table 23, and Table 29.  
Added Figure 1 and Figure 2.  
Added “Initialization” and “Configuration Files” sections.  
Cyclone V Device Datasheet  
Send Feedback  
Altera Corporation  

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