Datasheet > 5962-9679502MYA

5962-9679502MYA

更新时间： 2024-01-05 06:06:17

品牌	Logo	应用领域
WEDC		静态存储器内存集成电路
页数	文件大小	规格书
25页	172K
描述
Standard SRAM, 256KX16, 25ns, CMOS, CDSO44, CERAMIC, SOJ-44

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5962-9679502MYA 技术参数

生命周期：	Obsolete	包装说明：	CERAMIC, SOJ-44
Reach Compliance Code：	unknown	风险等级：	5.84
Is Samacsys：	N	最长访问时间：	25 ns
JESD-30 代码：	R-CDSO-J44	JESD-609代码：	e0
长度：	28.575 mm	内存密度：	4194304 bit
内存集成电路类型：	STANDARD SRAM	内存宽度：	16
功能数量：	1	端子数量：	44
字数：	262144 words	字数代码：	256000
工作模式：	ASYNCHRONOUS	最高工作温度：	125 °C
最低工作温度：	-55 °C	组织：	256KX16
封装主体材料：	CERAMIC, METAL-SEALED COFIRED	封装代码：	SOJ
封装形状：	RECTANGULAR	封装形式：	SMALL OUTLINE
并行/串行：	PARALLEL	认证状态：	Not Qualified
座面最大高度：	4.44 mm	最大供电电压 (Vsup)：	5.5 V
最小供电电压 (Vsup)：	4.5 V	标称供电电压 (Vsup)：	5 V
表面贴装：	YES	技术：	CMOS
温度等级：	MILITARY	端子面层：	TIN LEAD
端子形式：	J BEND	端子节距：	1.27 mm
端子位置：	DUAL	Base Number Matches：	1

5962-9679502MYA 数据手册

3.8 Notification of change for device class M. For device class M, notification to DSCC-VA of change of product (see 6.2

herein) involving devices acquired to this drawing is required for any change that affects this drawing.

3.9 Verification and review for device class M. For device class M, DSCC, DSCC's agent, and the acquiring activity retain

the option to review the manufacturer's facility and applicable required documentation. Offshore documentation shall be made

available onshore at the option of the reviewer.

3.10 Microcircuit group assignment for device class M. Device class M devices covered by this drawing shall be in

microcircuit group number 41 (see MIL-PRF-38535, appendix A).

4. VERIFICATION

4.1 Sampling and inspection. For device classes Q and V, sampling and inspection procedures shall be in accordance with

MIL-PRF-38535 or as modified in the device manufacturer's Quality Management (QM) plan. The modification in the QM plan

shall not affect the form, fit, or function as described herein. For device class M, sampling and inspection procedures shall be

in accordance with MIL-PRF-38535, appendix A.

4.2 Screening. For device classes Q and V, screening shall be in accordance with MIL-PRF-38535, and shall be conducted

on all devices prior to qualification and technology conformance inspection. For device class M, screening shall be in

accordance with method 5004 of MIL-STD-883, and shall be conducted on all devices prior to quality conformance inspection.

4.2.1 Additional criteria for device class M.

a. Delete the sequence specified as initial (preburn-in) electrical parameters through interim (postburn-in)

electrical parameters of method 5004 and substitute lines 1 through 6 of table IIA herein.

b. The test circuit shall be maintained by the manufacturer under document revision level control and shall be made

available to the preparing or acquiring activity upon request. The test circuit shall specify the inputs, outputs, biases,

and power dissipation, as applicable, in accordance with the intent specified in method 1015.

(1) Dynamic burn-in (method 1015 of MIL-STD-883, test condition D; for circuit, see 4.2.1b herein).

c. Interim and final electrical parameters shall be as specified in table IIA herein.

4.2.2 Additional criteria for device classes Q and V.

a. The burn-in test duration, test condition and test temperature, or approved alternatives shall be as specified in the

device manufacturer's QM plan in accordance with MIL-PRF-38535. The burn-in test circuit shall be maintained under

document revision level control of the device manufacturer's Technology Review Board (TRB) in accordance with

MIL-PRF-38535 and shall be made available to the acquiring or preparing activity upon request. The test circuit shall

specify the inputs, outputs, biases, and power dissipation, as applicable, in accordance with the intent specified in

method 1015 of MIL-STD-883.

b. Interim and final electrical test parameters shall be as specified in table IIA herein.

c. Additional screening for device class V beyond the requirements of device class Q shall be as specified in

MIL-PRF-38535, appendix B.

4.3 Qualification inspection for device classes Q and V. Qualification inspection for device classes Q and V shall be in

accordance with MIL-PRF-38535. Inspections to be performed shall be those specified in MIL-PRF-38535 and herein for

groups A, B, C, D, and E inspections (see 4.4.1 through 4.4.4).

SIZE

STANDARD

5962-96795

MICROCIRCUIT DRAWING

DEFENSE SUPPLY CENTER COLUMBUS

COLUMBUS, OHIO 43218-3990

REVISION LEVEL

SHEET

DSCC FORM 2234

APR 97

1 2 3 456 7 8...25

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与5962-9679502MYA相关器件

型号	品牌	获取价格	描述	数据表
5962-9679502MYX	WEDC	获取价格	Standard SRAM, 256KX16, 25ns, CMOS, CDSO44, CERAMIC, SOJ-44
5962-9679503MXA	WEDC	获取价格	Standard SRAM, 256KX16, 20ns, CMOS, FP-44
5962-9679503MXX	WEDC	获取价格	IC 256K X 16 STANDARD SRAM, 20 ns, DFP44, FP-44, Static RAM
5962-9679503MYA	WEDC	获取价格	Standard SRAM, 256KX16, 20ns, CMOS, CDSO44, CERAMIC, SOJ-44
5962-9679504MXA	WEDC	获取价格	Standard SRAM, 256KX16, 35ns, CMOS, FP-44
5962-9679504MXX	WEDC	获取价格	Standard SRAM, 256KX16, 35ns, CMOS, FP-44
5962-9679504MYA	WEDC	获取价格	Standard SRAM, 256KX16, 35ns, CMOS, CDSO44, CERAMIC, SOJ-44
5962-9679505MXA	WEDC	获取价格	Standard SRAM, 256KX16, 25ns, CMOS, FP-44
5962-9679505MYA	WEDC	获取价格	Standard SRAM, 256KX16, 25ns, CMOS, CDSO44, CERAMIC, SOJ-44
5962-9679506MXA	WEDC	获取价格	Standard SRAM, 256KX16, 20ns, CMOS, FP-44

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