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3N166 PDF预览

3N166

更新时间: 2024-02-24 14:38:42
品牌 Logo 应用领域
Linear Systems 晶体晶体管输入元件放大器
页数 文件大小 规格书
2页 21K
描述
MONOLITHIC DUAL P-CHANNEL ENHANCEMENT MODE MOSFET

3N166 技术参数

是否无铅: 含铅是否Rohs认证: 不符合
生命周期:ActiveReach Compliance Code:unknown
风险等级:5.37Is Samacsys:N
配置:SEPARATE, 2 ELEMENTS最大漏极电流 (Abs) (ID):0.05 A
FET 技术:METAL-OXIDE SEMICONDUCTORJEDEC-95代码:TO-99
JESD-30 代码:O-MBCY-W8元件数量:2
端子数量:8工作模式:ENHANCEMENT MODE
最高工作温度:200 °C封装主体材料:METAL
封装形状:ROUND封装形式:CYLINDRICAL
峰值回流温度(摄氏度):NOT SPECIFIED极性/信道类型:P-CHANNEL
最大功率耗散 (Abs):0.3 W认证状态:Not Qualified
子类别:Other Transistors表面贴装:NO
端子形式:WIRE端子位置:BOTTOM
处于峰值回流温度下的最长时间:NOT SPECIFIED晶体管元件材料:SILICON
Base Number Matches:1

3N166 数据手册

 浏览型号3N166的Datasheet PDF文件第1页 
MATCHING CHARACTERISTICS 3N165  
LIMITS  
SYMBOL  
Yfs1/Yfs2  
VGS1-2  
CHARACTERISTICS  
MIN. MAX. UNITS  
CONDITIONS  
ID= -500 µA  
ID= -500 µA  
IA= -500 µA  
Forward Transconductance Ratio  
Gate Source Threshold Voltage Differential  
0.90  
--  
1.0  
100  
100  
VDS= -15 V  
VDS= -15 V  
f=1kHz  
mV  
VGS1-2/T Gate Source Threshold Voltage Differential  
--  
µV/°C VDS= -15 V  
Change with Temperature  
TA= -55°C to = +25°C  
TYPICAL SWITCHING WAVEFORM  
VDD  
10%  
10%  
R1  
tr  
ton  
90%  
10%  
R2  
VOUT  
10%  
toff  
50  
INPUT PULSE  
SAMPLING SCOPE  
Tr 0.2ns  
Rise Time 2ns  
C
IN  
2pF  
Pulse Width 200ns  
R
IN  
10M  
Switching Times Test Circuit  
NOTES:  
1. MOS field-effect transistors have extremely high input resistance and can be damaged by the accumulation of excess static  
charge. To avoid possible damage to the device while wiring, testing, or in actual operation, follow these procedures:  
To avoid the build-up of static charge, the leads of the devices should remain shorted together with a metal ring except when  
being tested or used. Avoid unnecessary handling. Pick up devices by the case instead of the leads. Do not insert or remove  
devices from circuits with the power on, as transient voltages may cause permanant damage to the devices.  
2. Per transistor.  
3. Devices must mot be tested at ±125V more than once, nor for longer than 300ms.  
4. For design reference only, not 100% tested.  
Stresses above those listed under "Absolute Maximum Ratings" may cause permanent damage to the device. These are stress  
ratings only and functional operation of the device at these or any other conditions above those indicated in the operational  
sections of the specifications is not implied. Exposure to absolute maximum rating conditions for extended periods may affect  
device reliability.  
Linear Integrated Systems 4042 Clipper Ct., Fremont, CA 94538 TEL: (510) 490-9160 • FAX: (510) 353-0261  

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