2SC5455

更新时间： 2024-02-26 11:12:20

品牌	Logo	应用领域
日电电子 - NEC		晶体晶体管
页数	文件大小	规格书
12页	80K
描述
NPN EPITAXIAL SILICON TRANSISTOR 4-PIN MINI MOLD

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中文翻译

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数据手册

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2SC5455 数据手册

PRELIMINARY DATA SHEET

SILICON TRANSISTOR

2SC5455

NPN EPITAXIAL SILICON TRANSISTOR

4-PIN MINI MOLD

FEATURE

PACKAGE DIMENSIONS (in mm)

•

Ideal for medium-output applications

High gain, low noise

+0.2

–0.3

+0.2

–0.1

2.8

1.5

Small reverse transfer capacitance

Can operate at low voltage

ABSOLUTE MAXIMUM RATINGS (TA = 25 °C)

PARAMETER

Collector to Base Voltage

Collector to Emitter Voltage

Emitter to Base Voltage

Collector Current

SYMBOL

VCBO

VCEO

VEBO

RATING

UNIT

5°

100

°C

Total Power Dissipation

Junction Temperature

Storage Temperature

200

150

PIN CONNECTIONS

1: Collector

2: Emitter

T^stg

–65 to +150

3: Base

4: Emitter

ELECTRICAL CHARACTERISTICS (TA = 25 °C)

PARAMETER

Collector Cut-off Current

Emitter Cut-off Current

DC Current Gain

SYMBOL

ICBO

TEST CONDITIONS

VCB = 5 V, IE = 0

MIN.

TYP.

MAX.

0.1

UNIT

µA

IEBO

VEB = 1 V, IC = 0

0.1

µA

hFE

VCE = 3 V, IC = 30 mA^{Note 1}

VCE = 3 V, IC = 30 mA, f = 2 GHz

VCB = 3 V, IE = 0, f = 1 MHz^{Note 2}

VCE = 3 V, IC = 30 mA, f = 2 GHz

VCE = 3 V, IC = 7 mA, f = 2 GHz

150

Gain Bandwidth Product

Reverse Transfer Capacitance

Insertion Power Gain

Noise Figure

12.0

0.5

GHz

Cre

0.7

2.5

|S21e|²

8.0

10.0

1.5

Notes 1. Pulse measurement PW ≤ 350 µs, duty cycle ≤ 2 %

2. Collector to base capacitance measured by capacitance meter (automatic balance bridge method) when

emitter pin is connected to the guard pin.

Because this product uses high-frequency process, avoid excessive input of static electricity, etc.

The information in this document is subject to change without notice.

Document No. P13081EJ1V0DS00 (1st edition)

Date Published February 1998 N CP(K)

Printed in Japan

1998

12 3 4 5 6 7...12

中文翻译

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