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2SC5338-SF PDF预览

2SC5338-SF

更新时间: 2024-11-24 13:04:19
品牌 Logo 应用领域
日电电子 - NEC 晶体放大器晶体管
页数 文件大小 规格书
10页 73K
描述
RF Small Signal Bipolar Transistor, 0.15A I(C), 1-Element, Ultra High Frequency Band, Silicon, NPN, POWER, MINIMOLD PACKAGE-4

2SC5338-SF 技术参数

是否Rohs认证:不符合生命周期:Transferred
包装说明:POWER, MINIMOLD PACKAGE-4Reach Compliance Code:compliant
风险等级:5.68Is Samacsys:N
外壳连接:COLLECTOR最大集电极电流 (IC):0.15 A
基于收集器的最大容量:2 pF集电极-发射极最大电压:12 V
配置:SINGLE最高频带:ULTRA HIGH FREQUENCY BAND
JESD-30 代码:R-PSSO-F3JESD-609代码:e0
元件数量:1端子数量:3
封装主体材料:PLASTIC/EPOXY封装形状:RECTANGULAR
封装形式:SMALL OUTLINE峰值回流温度(摄氏度):NOT SPECIFIED
极性/信道类型:NPN认证状态:Not Qualified
表面贴装:YES端子面层:TIN LEAD
端子形式:FLAT端子位置:SINGLE
处于峰值回流温度下的最长时间:NOT SPECIFIED晶体管应用:AMPLIFIER
晶体管元件材料:SILICON标称过渡频率 (fT):6000 MHz
Base Number Matches:1

2SC5338-SF 数据手册

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PRELIMINARY DATA SHEET  
Silicon Transistor  
2SC5338  
NPN EPITAXIAL SILICON TRANSISTOR  
HIGH FREQUENCY LOW DISTORTION AMPLIFIER  
DESCRIPTION  
The 2SC5338 is designed for a low distortion and low noise RF amplifier with an operation on the low supply  
voltage (VCE = 5 V). This low distortion characteristics is suitable for the CATV, tele-communication, and such.  
FEATURES  
PACKAGE DIMENSIONS  
High gain  
(in millimeters)  
|S21 |2 = 10 dB TYP., @VCE = 5 V, Ic = 50 mA, f = 1 GHz  
4.5±0.1  
Low distortion and low voltage  
1.6±0.2  
1.5±0.1  
IM2 = 55 dB TYP., IM3 = 76 dB TYP.  
µ
@VCE = 5 V, Ic = 50 mA, Vin = 105 dB V/75  
New power mini-mold package version of a 4-pin type  
gain-improved on the 2SC4703  
C
B
E
E
ABSOLUTE MAXIMUM RATINGS (TA = 25 °C)  
0.42  
±0.06  
0.42  
±0.06  
Parameter  
Collector to Base Voltage  
Collector to Emitter Voltage  
Emitter to Base Voltage  
Collector Current  
Symbol  
VCBO  
VCEO  
VEBO  
IC  
Rating  
Unit  
V
0.25±0.02  
25  
12  
1.5  
3.0  
0.46  
±0.06  
V
2.5  
V
150  
mA  
W
Note1  
PIN CONNECTIONS  
E: Emitter  
C: Collector  
B: Base  
Total Power Dissipation  
Junction Temperature  
Storage Temperature  
PT  
1.8  
Tj  
150  
°C  
°C  
Tstg  
–65 to +150  
2
Note 1  
×
. 0.7 mm 16 cm double sided ceramic substrate (Copper plaiting)  
Document No. P10940EJ1V0DS00 (1st edition)  
Date Published April 1996 P  
Printed in Japan  
©
1996  

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