25AA080/160
8K/16K 1.8V SPI Bus Serial EEPROM
FEATURES
PACKAGE TYPES
• 3 MHz Clock Rate
• SPI Modes 0,0 and 1,1.
PDIP
• Single supply with programming operation down
to 1.8V
• Low Power CMOS Technology
- Max Write Current: 5 mA
- Read Current: 1.0 mA
- Standby Current: 1 µA typical
• Organization
- 1024 x 8 for 25AA080
Vcc
CS
SO
1
2
3
4
8
7
6
5
HOLD
WP
Vss
SCK
SI
- 2048 x 8 for 25AA160
• 16 Byte Page
• Self-timed ERASE and WRITE Cycles
• Sequential Read
• Block Write Protection
SOIC
1
8
Vcc
CS
- Protect none, 1/4, 1/2, or all of Array
• Built-in Write Protection
- Power On/Off Data Protection Circuitry
- Write Latch
- Write Protect Pin
• High Reliability
- Endurance: 10M cycles (guaranteed)
- Data Retention: >200 years
- ESD protection: >4000 V
• 8-pin PDIP/SOIC Packages
• Temperature ranges supported
2
3
4
7
6
5
SO
WP
Vss
HOLD
SCK
SI
BLOCK DIAGRAM
- Commercial (C):
- Industrial (I):
0°C to +70°C
-40°C to +85°C
Status
Register
HV Generator
DESCRIPTION
The Microchip Technology Inc. 25AA080/160 are 8K
and 16K bit Serial Electrically Erasable PROMs. The
memory is accessed via a simple Serial Peripheral
Interface (SPI) compatible serial bus. The bus signals
required are a clock input (SCK) plus separate data in
(SI) and data out (SO) lines. Access to the device is
controlled through a chip select (CS) input, allowing any
number of devices to share the same bus.
EEPROM
Array
Memory
Control
Logic
X
I/O Control
Logic
Dec
Page Latches
WP
SI
There are two other inputs that provide the end user
with additional flexibility. Communication to the device
can be paused via the hold pin (HOLD). While the
device is paused, transitions on its inputs will be
ignored, with the exception of chip select, allowing the
host to service higher priority interrupts. Also write
operations to the Status Register can be disabled via
the write protect pin (WP).
Y Decoder
SO
CS
SCK
HOLD
Sense Amp.
R/W Control
Vcc
Vss
SPI is a trademark of Motorola.
1996 Microchip Technology Inc.
Preliminary
DS21146D-page 1
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