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XR81111

更新时间: 2024-11-12 01:13:11
品牌 Logo 应用领域
艾科嘉 - EXAR /
页数 文件大小 规格书
12页 232K
描述
Universal Clock - High Frequency LVPECL Clock Synthesizer

XR81111 数据手册

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XR81111  
Universal Clock - High Frequency  
LVPECL Clock Synthesizer  
General Description  
FEATURES  
• XR81111-CA04: Factory Configured  
The XR81111-CA04 is a clock synthesizer with Integer divider, LVPECL  
driver, 3.3V/2.5V supply, taking a 25MHz Xtal input and providing one of four  
selectable output frequencies. The device is optimized for use with a 25MHz  
crystal (or system clock) and generates a selection of output frequencies -  
156.25MHz for 10GE/XAUI, 150MHz for SAS, 125MHz for GE and 100MHz  
for PCIe applications.  
• Footprint compatible with 5mm x 7mm differen-  
tial oscillators  
• One differential LVPECL output pair  
• Crystal oscillator interface which can also be  
overdriven using a single-ended reference clock  
• Output frequency range: 100MHz - 156.25MHz  
The application diagram below shows a typical synthesizer configuration  
with any standard crystal oscillating in fundamental mode. Internal load  
capacitors are optionally available to minimize/eliminate external crystal  
loads. A system clock can also be used to overdrive the oscillator for a syn-  
chronous timing system.  
• Crystal/input frequency: 25MHz, parallel resonant  
crystal  
• VCO range: 2GHz - 3GHz  
• RMS phase jitter @ 156.25MHz, 12kHz - 20MHz:  
<0.60ps  
• Full 3.3V or 2.5V operating supply  
• -40°C to 85°C ambient operating temperature  
• Lead-free (RoHS 6) package  
The typical phase noise plot below shows the jitter integrated over the  
12KHz to 20MHz range that is widely used in WAN systems. Most LAN  
applications however use the integration range of 1.875MHz to 20MHz.  
These clock devices show a very good high frequency noise floor below -  
150dB.  
APPLICATIONS  
• 10GE, GE LAN/WAN  
The XR81111 is a family of Universal Clock synthesizer devices in QFN-10  
packages that are footprint compatible with industry standard 5mm x 7mm  
oscillators. The devices generate ANY frequency in the range of 100 MHz to  
1.5GHz by utilizing a highly flexible delta sigma modulator and a wide rang-  
ing VCO. The high clock frequency LVPECL outputs have very low phase  
noise jitter of sub 0.6ps, while consuming extremely low power. These  
devices can be used with standard crystals or external system clock and can  
be configured to select from four different frequency multiplier settings to  
support a wide variety of applications. This family of products have an  
extremely low power PLL block with core power consumption less than 40%  
of the equivalent devices from competition. By second sourcing several of  
the existing sockets, these devices provides a very compelling power effi-  
ciency value benefit across all market segments.  
• 2.5G/10G SONET/SDH/OTN  
• xDSL, PCIe  
• Low-jitter Clock Generation  
• Synchronized clock systems  
Ordering Information – page 12  
Other clock multiplier and/or driver configurations are possible in this clock  
family and can be requested from the factory  
Typical Application  
XR81111PHASENOISE(dBc/Hz)  
XR81111ͲCA04  
-40db  
VCC  
Q
2.5Vor3.3V  
RMS Jitter = 532.3fs  
-60db  
-80db  
XTAL_IN  
100MHzto156.25MHz  
Int Range 12KHz to 20MHz  
25MHz  
Q
XTAL_OUT  
OE  
-100db  
-120db  
-140db  
-160db  
-180db  
Enable  
FSEL1  
FreqSelect  
FSEL0  
VEE  
100Hz  
1KHz  
10KHz  
100KHz  
1MHz  
10MHz  
1 / 12  
exar.com/XR81111  
Rev 1B  
© 2014 Exar Corporation  

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