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XR81101-AA02-F PDF预览

XR81101-AA02-F

更新时间: 2024-11-24 20:07:51
品牌 Logo 应用领域
艾科嘉 - EXAR 时钟光电二极管外围集成电路晶体
页数 文件大小 规格书
8页 199K
描述
Clock Generator, 125MHz, CMOS, PDSO8, TSSOP-8

XR81101-AA02-F 技术参数

是否Rohs认证: 符合生命周期:Obsolete
包装说明:TSSOP-8Reach Compliance Code:compliant
ECCN代码:EAR99HTS代码:8542.39.00.01
风险等级:5.83JESD-30 代码:R-PDSO-G8
长度:4.4 mm端子数量:8
最高工作温度:85 °C最低工作温度:-40 °C
最大输出时钟频率:125 MHz封装主体材料:PLASTIC/EPOXY
封装代码:TSSOP封装形状:RECTANGULAR
封装形式:SMALL OUTLINE, THIN PROFILE, SHRINK PITCH峰值回流温度(摄氏度):NOT SPECIFIED
主时钟/晶体标称频率:25 MHz座面最大高度:1.1 mm
最大供电电压:3.465 V最小供电电压:3.135 V
标称供电电压:3.3 V表面贴装:YES
技术:CMOS温度等级:INDUSTRIAL
端子形式:GULL WING端子节距:0.65 mm
端子位置:DUAL处于峰值回流温度下的最长时间:NOT SPECIFIED
宽度:3 mmuPs/uCs/外围集成电路类型:CLOCK GENERATOR, OTHER
Base Number Matches:1

XR81101-AA02-F 数据手册

 浏览型号XR81101-AA02-F的Datasheet PDF文件第2页浏览型号XR81101-AA02-F的Datasheet PDF文件第3页浏览型号XR81101-AA02-F的Datasheet PDF文件第4页浏览型号XR81101-AA02-F的Datasheet PDF文件第5页浏览型号XR81101-AA02-F的Datasheet PDF文件第6页浏览型号XR81101-AA02-F的Datasheet PDF文件第7页 
XR81101  
Universal Clock - High Frequency  
LVCMOS Clock Synthesizer  
FEATURES  
General Description  
• XR81101-AA02: Factory configured  
The XR81101-AA02 is a clock synthesizer operating at a 3.3V/2.5V sup-  
ply with Integer divider, using a 25MHz parallel resonant crystal reference  
input provides a 125MHz LVCMOS output. The device is optimized for  
use with a 25MHz crystal (or system clock) and generates a 125MHz out-  
put clock for GE applications. The LVCMOS output has very low phase  
noise jitter of sub 150fs, while consuming extremely low power.  
• One LVCMOS output  
• Crystal oscillator interface which can also be  
overdriven using a single-ended reference clock  
• Output frequency: 125MHz  
• Crystal/input frequency: 25MHz, parallel resonant  
crystal  
The application diagram below shows a typical synthesizer configuration  
with any standard crystal oscillating in fundamental mode. Internal load  
capacitors are optionally available to minimize/eliminate external crystal  
loads. A system clock can also be used to overdrive the oscillator for a  
synchronous timing system.  
• RMS phase jitter @ 125MHz, 1.875MHz - 20MHz:  
< 150fs  
• Full 3.3V or 2.5V operating supply  
• -40°C to 85°C ambient operating temperature  
• Lead-free (RoHS 6) package  
The typical phase noise plot below shows the jitter integrated over the  
1.875MHz to 20MHz range that is widely used in WAN systems. These  
clock devices show a very good high frequency noise floor below -150dB.  
APPLICATIONS  
• Gigabit Ethernet  
• Low-jitter Clock Generation  
• Synchronized clock systems  
The XR81101 is a family of Universal Clock synthesizer devices in  
TSSOP-8 packages. The devices generate ANY frequency in the range of  
10MHz to 200MHz by utilizing a highly flexible delta sigma modulator and  
a wide ranging VCO. These devices can be used with standard crystals or  
external system clock to support a wide variety of applications. This family  
of products has an extremely low power PLL block with core power con-  
sumption 40% less than the equivalent devices from competition. By sec-  
ond sourcing several of the existing sockets, these devices provides a  
very compelling power efficiency value benefit across all market seg-  
ments.  
Ordering Information – page 8  
Other clock multiplier and/or driver configurations are possible in this  
clock family and can be requested from the factory  
Typical Application  
XR81101ͲAA02  
XR81101PHASENOISE(dBc/Hz)  
-40db  
VCC  
2.5Vor3.3V  
RMS Jitter = 123.6fs  
Q
-60db  
XTAL_IN  
125MHz  
Int Range 1.875MHz to 20MHz  
-80db  
-100db  
-120db  
-140db  
-160db  
-180db  
25MHz  
Enable  
XTAL_OUT  
OE  
VEE  
100Hz  
1KHz  
10KHz  
100KHz  
1MHz  
10MHz  
1 / 8  
exar.comXR81101  
Rev 1A  
© 2014 Exar Corporation  

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