Datasheet > XMC7200-F176K8384AA

XMC7200-F176K8384AA

更新时间： 2023-09-03 20:30:55

品牌	Logo	应用领域
英飞凌 - INFINEON		/
页数	文件大小	规格书
189页	2067K
描述
The XMC7100/7200 series belongs to the XMC7000 family of 32-bit industrial microcontrollers based on -up to two- ARM Cortex-M7 processor cores.

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XMC7000 microcontroller

32-bit Arm® Cortex®-M7

Features list

Table 1-1

XMC7200 feature list for all packages

Packages

Features

176-TEQFP

272-BGA

CPU

One or two 32-bit Arm® Cortex®-M7 CPUs and a 32-bit Arm® Cortex®

M0+ CPU

Core

Operating voltage

2.7 V to 5.5 V

Operating voltage for HSIO_STD

Core voltage

Not supported

2.7 V to 3.6 V

1.05 V to 1.15 V

Arm® Cortex®-M7 350 MHz (max for each) and Arm® Cortex®-M0+ 100

MHz (max)

Operating frequency

MPU, PPU

Supported

FPU

Supports both single (32-bit) and double (64-bit) precision

Supported by Arm® Cortex®-M7 CPUs

DSP-MUL/DIV/MAC

TCM

16-KB instruction and 16-KB data for each Cortex-M7 CPU

Memory

Code-flash

Work-flash

SRAM (configurable for retention)

ROM

8384 KB (8128 KB + 256 KB)

256 KB (192 KB + 64 KB)

1024 KB

64 KB

Communication interfaces

CAN0 (CAN-FD: Up to 8 Mbps)

CAN1 (CAN-FD: Up to 8 Mbps)

CAN RAM

5 ch

40 KB per instance (5 ch), 80 KB in total

Serial communication Block (SCB/UART)

Serial communication Block (SCB/I²C)

Serial communication Block (SCB/SPI)

10 ch

11 ch

1 ch × 10/100

2 ch (option) × 10/100/1000

Ethernet MAC

ETH0: MII/RMII on GPIO_STD,

ETH1: RGMII on HSIO_STD

ETH0: MII/RMII on GPIO_STD

Memory interfaces

1 ch (GPIO_STD at 26 MHz)

1 ch (GPIO_STD at 32 MHz)

1 ch (HSIO_STD at 50 MHz, GPIO_STD at 26 MHz)

1 ch (HSIO_STD at 100 MHz, GPIO_STD at 32 MHz)

eMMC/SD

Single SPI/ Dual SPI/ Quad SPI/ OctalSPI

/ HYPERBUS™

Timers

RTC

1 ch

TCPWM (16-bit) (Motor Control)

TCPWM (16-bit)

TCPWM (32-bit)

External interrupts

15 ch (TCPWM0/3, TCPWM1/12)

87 ch (TCPWM0/3, TCPWM1/84)

16 ch (TCPWM0/3, TCPWM1/13)

220

148

Datasheet

002-33522 Rev. *B

2022-10-21

1...4 5 678 9 10...189

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