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XCTA20111801B PDF预览

XCTA20111801B

更新时间： 2023-08-15 00:00:00
品牌 Logo 应用领域
威世 - VISHAY /
页数 文件大小 规格书
3页 106K
描述
RES NET,THIN FILM,11.8K OHMS,100WV,.1% +/-TOL,-100,100PPM TC,0303 CASE

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XCTA20111801B 数据手册

 浏览型号XCTA20111801B的Datasheet PDF文件第2页浏览型号XCTA20111801B的Datasheet PDF文件第3页 
CTA  
Vishay Electro-Films  
Thin Film, Center-Tapped Resistor  
FEATURES  
• Wire bondable  
Product may not  
be to scale  
• Center tap feature  
• Tight ratio tolerances to: 0.1 %  
• Chip size: 0.030 inches square  
The CTA series resistor chips combine the best tolerances,  
stability and low shunt capacitance. The CTA offers the  
designer flexibility in use as either a single value resistor or  
as two resistors with a center tap feature. The CTAs six  
bonding pads allows the user increased layout flexibility. The  
CTAs are manufactured using Vishay Electro-Films (EFI)  
sophisticated thin film equipment and manufacturing  
technology. The CTAs are 100 % electrically tested and  
visually inspected to MIL-STD-883.  
• Resistance range total: 25 Ω to 35 kΩ  
• Alumina substrate, low shunt capacitance: < 0.2 pF  
• Resistor material nichrome  
• Excellent stability: 0.025 % maximum ΔR/R  
APPLICATIONS  
I
I
I
The CTA center-tapped resistor chips are used mainly in  
feedback circuits of amplifiers where ratio matching, low  
shunt capacitance and tracking between two resistors is  
critical.  
RA  
RB  
Recommended for hermetic environments where chip is not  
exposed to moisture.  
For lower values, the resistance of the six bonding-pad  
configurations can vary, depending on the method of  
measurement used. Vishay EFI measures low-value  
resistors by the four-wire Kelvin technique. The measuring  
method is illustrated in the diagram to the right.  
V
V
V
TEMPERATURE COEFFICIENT OF RESISTANCE, VALUES AND TOLERANCES  
Tightest Standard Tolerance Available  
PROCESS CODE  
1.ꢀ %  
CLASS H*  
CLASS K*  
233  
ꢀ1 ppmꢁ/C  
203  
ꢂ2 ppmꢁ/C  
202  
232  
21 ppmꢁ/C  
200  
230  
ꢀ11 ppmꢁ/C  
201  
231  
*MIL-PRF-38534 inspection criteria  
ꢀ kΩ  
ꢂ2 Ω ꢀ11 Ω ꢂ11 Ω  
ꢂ1 kΩ 32 kΩ  
STANDARD ELECTRICAL SPECIFICATIONS  
PARAMETER  
TCR Tracking Between Halves (RAꢁRB)  
Center Tap Ratio, RAꢁRB: Tolerance  
Noise, MIL-STD-ꢂ1ꢂ, Method 318  
2 ppm/°C*  
1 % standard  
- 35 dB typ.  
1
Moisture Resistance, MIL-STD-ꢂ1ꢂ, Method ꢀ16, (Passivated only)  
Stability, ꢀ111 h, + ꢀꢂ2 /C, 6ꢂ mW  
Operating Temperature Range  
Thermal Shock, MIL-STD-ꢂ1ꢂ, Method ꢀ17, Test Condition F  
High Temperature Exposure, + ꢀ21 /C, ꢀ11 h  
Insulation Resistance  
0.5 % max. ΔR/R  
0.025 % max. ΔR/R  
- 55 °C to + 125 °C  
0.1 % max. ΔR/R  
0.1 % max. ΔR/R  
1012 min.  
Operating Voltage  
100 V max.  
DC Power Rating at + 71 /C (Derated to Zero at + ꢀ21 /C)  
2 x Rated Power Short-Time Overload, + ꢂ2 /C, 2 s  
125 mW  
0.25 % max. ΔR/R %  
*10ppm/°C for R < 100  
www.vishay.com  
68  
For technical questions, contact: efi@vishay.com  
Document Number: 61015  
Revision: 12-Mar-08  
123

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