Datasheet > XCR22V10-7PC28I

XCR22V10-7PC28I

更新时间： 2024-11-11 03:14:43

品牌	Logo	应用领域
赛灵思 - XILINX		/
页数	文件大小	规格书
14页	209K
描述
5V Zero Power, TotalCMOS, Universal PLD Device

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XCR22V10-7PC28I 数据手册

XCR22V10: 5V Zero Power,

TotalCMOS, Universal PLD Device

DS048 (v1.1) February 10, 2000

Product Specification

Features

Description

•

Industry's first TotalCMOS™ SPLD - both CMOS

design and process technologies

Fast Zero Power (FZP™) design technique provides

ultra-low power and high speed

The XCR22V10 is the first SPLD to combine high perfor-

mance with low power, without the need for "turbo bits" or

other power down schemes. To achieve this, Xilinx has

used their FZP design technique, which replaces conven-

tional sense amplifier methods for implementing product

terms (a technique that has been used in PLDs since the

bipolar era) with a cascaded chain of pure CMOS gates.

This results in the combination of low power and high

speed that has previously been unattainable in the PLD

arena. For 3V operation, Xilinx offers the XCR22LV10 that

offers high speed and low power in a 3V implementation.

•

Static current of less than 75 µA

Dynamic current substantially below that of

competing devices

Pin-to-pin delay of only 7.5 ns

•

True Zero Power device with no turbo bits or power

down schemes

Function/JEDEC map compatible with Bipolar,

UVCMOS, EECMOS 22V10s

Multiple packaging options featuring PCB-friendly

flow-through pinouts (SOL and TSSOP)

The XCR22V10 uses the familiar AND/OR logic array

structure, which allows direct implementation of

sum-of-products equations. This device has a programma-

ble AND array which drives a fixed OR array. The OR sum

of products feeds an "Output Macro Cell" (OMC), which can

be individually configured as a dedicated input, a combina-

torial output, or a registered output with internal feedback.

24-pin TSOIC–uses 93% less in-system space than

a 28-pin PLCC

24-pin SOIC

28-pin PLCC with standard JEDEC pinout

•

Available in commercial and industrial operating ranges

•

Advanced 0.5µ E²CMOS process

Functional Description

The XCR22V10 implements logic functions as

1000 erase/program cycles guaranteed

20 years data retention guaranteed

Varied product term distribution with up to 16 product

terms per output for complex functions

Programmable output polarity

Synchronous preset/asynchronous reset capability

Security bit prevents unauthorized access

Electronic signature for identification

Design entry and verification using industry standard

CAE tools

sum-of-products expressions in

programmable

-AND/fixed-OR logic array. User-defined functions are cre-

ated by programming the connections of input signals into

the array. User-configurable output structures in the form of

I/O macrocells further increase logic flexibility (Figure 1).

•

Reprogrammable using industry standard device

programmers

DS048 (v1.1) February 10, 2000

www.xilinx.com

1-800-255-7778

12 3 4 5 6 7...14

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与XCR22V10-7PC28I相关器件

型号	品牌	获取价格	描述	数据表
XCR22V10-7SO24	XILINX	获取价格	5V Zero Power, TotalCMOS, Universal PLD Device
XCR22V10-7SO24C	XILINX	获取价格	EE PLD, 7.5ns, CMOS, PDSO24, PLASTIC, SOIC-24
XCR22V10-7VO24C	XILINX	获取价格	5V Zero Power, TotalCMOS, Universal PLD Device
XCR22V10-7VO24I	XILINX	获取价格	5V Zero Power, TotalCMOS, Universal PLD Device
XCR-3	ETC	获取价格	CODING RING ORANGE
XCR3032	XILINX	获取价格	32 Macrocell CPLD
XCR3032-10PC44C	XILINX	获取价格	32 Macrocell CPLD
XCR3032-10PC44I	XILINX	获取价格	32 Macrocell CPLD
XCR3032-10VQ44C	XILINX	获取价格	32 Macrocell CPLD
XCR3032-10VQ44I	XILINX	获取价格	32 Macrocell CPLD

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