Datasheet > XC4VSX25

XC4VSX25

更新时间： 2024-11-12 03:53:31

品牌	Logo	应用领域
赛灵思 - XILINX		/
页数	文件大小	规格书
10页	114K
描述
Virtex-4⑩ Family / newest generation FPGA

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中文翻译

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数据手册

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XC4VSX25 数据手册

Virtex-4 User Guide

Virtex-4 Family Overview

DS112 (v1.1) September 10, 2004

Advance Product Specification

General Description

The Virtex-4™ Family is the newest generation FPGA from Xilinx. The innovative Advanced Silicon Modular Block or

ASMBL™ column-based architecture is unique in the programmable logic industry. Virtex-4 FPGAs contain three families

(platforms): LX, FX, and SX. Choice and feature combinations are offered for all complex applications. A wide array of

hard-IP core blocks complete the system solution. These cores include the PowerPC™ processors (with a new APU

interface), Tri-Mode Ethernet MACs, 622 Mb/s to 11.1 Gb/s serial transceivers, voltage/temperature system monitor blocks,

dedicated DSP slices, high-speed clock management circuitry, and source-synchronous interface blocks. The basic Virtex-4

building blocks are an enhancement of those found in the popular Virtex-based product families: Virtex, Virtex-E, Virtex-II,

Virtex-II Pro, and Virtex-II Pro X, allowing upward compatibility of existing designs. Virtex-4 devices are produced on a

state-of-the-art 90-nm copper process, using 300 mm (12 inch) wafer technology. Combining a wide variety of flexible

features, the Virtex-4 family enhances programmable logic design capabilities and is a powerful alternative to ASIC

technology.

Summary of Virtex-4 Features

•

Three families LX/SX/FX

•

SelectIO Technology

Virtex-4 LX: High-performance logic applications solution

Virtex-4 FX: High-performance, full-featured solution for

embedded platform applications

Virtex-4 SX: High-performance solution for Digital Signal

Processing (DSP) applications

1.5 to 3.3 V I/O Operation

Built-In ChipSync™ Source-Synchronous Technology

Digitally-controlled impedance (DCI) active termination

Fine grained I/O banking (Configuration in one bank)

•

Flexible Logic Resources

•

Xesium™ Clock Technology

Built-in System Monitor (voltage/temp. measurement)

10-bit, 200kSPS A/D Converter (ADC)

Secure Chip AES Bitstream Encryption

90-nm copper CMOS process

1.2V core voltage

Flip-Chip Packaging

RocketIO™ 622 Mb/s to 11.1 Gb/s Multi-Gigabit

Transceivers (MGT) (FX only)

Digital Clock Manager (DCM) blocks

Additional Phase-Matched Clock Dividers (PMCD)

Differential Global Clocks

XtremeDSP™ Slice

18x18, two’s complement, signed Multiplier

Optional pipeline stages

Built-In Accumulator (48-bits) & Adder/Subtracter

Smart RAM Memory Hierarchy

Distributed RAM

Dual-Port 18-Kbit RAM blocks

•

IBM PowerPC RISC Processor Core (FX only)

Optional pipeline stages

Optional programmable FIFO logic - Automatically

remaps RAM signals as FIFO signals

PowerPC 405 (PPC405) Core

Auxiliary Processor Unit Interface (User Coprocessor)

Multiple Tri-Mode Ethernet MACs (FX only)

High-speed memory interface support: DDR and DDR-2

SDRAM, QDR-II, RLDRAM-II, and FCRAM-II

Table 1: Virtex-4 FPGA Family Members

(1)

Configurable Logic Blocks (CLBs)

Block RAM

Xtreme

DSP

Slices

PowerPC

Processor

Blocks

RocketIO Total Max

Transciever I/O User

System ADC

Monitors Blocks

Ethernet

MACs

Array

Row x Col

Logic

Cells

Slices

Max

Distributed

RAM (Kb)

18 Kb

Blocks

Max

Block

RAM (Kb)

Device

DCMs PMCDs

(2)

Blocks

Banks I/O

XC4VLX15

XC4VLX25

XC4VLX40

XC4VLX60

XC4VLX80

64 x 24

96 x 28

13,824

24,192

41,472

59,904

80,640

6,144

10,752

18,432

26,624

35,840

168

288

416

560

768

1056

1392

864

N/A

320

448

640

768

960

1,296

1,728

2,880

3,600

4,320

5,184

6,048

128 x 36

128 x 52

160 x 56

160

200

240

288

336

XC4VLX100 192 x 64 110,592 49,152

XC4VLX160 192 x 88 152,064 67,584

XC4VLX200 192 x 116 200,448 89,088

All other trademarks and registered trademarks are the property of their respective owners. All specifications are subject to change without notice.

DS112 (v1.1) September 10, 2004

www.xilinx.com

Advance Product Specification

12 3 4 5 6 7...10

中文翻译

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与XC4VSX25相关器件

型号	品牌	获取价格	描述	数据表
XC4VSX25-10FF668C	XILINX	获取价格	Field Programmable Gate Array, 2560 CLBs, 1028MHz, 23040-Cell, CMOS, PBGA668, FBGA-668
XC4VSX25-10FF668I	XILINX	获取价格	Field Programmable Gate Array, 2560 CLBs, 1028MHz, 23040-Cell, CMOS, PBGA668, FBGA-668
XC4VSX25-10FF668IS2	XILINX	获取价格	Field Programmable Gate Array, 1028MHz, 23040-Cell, CMOS, PBGA668,
XC4VSX25-10FF676C	XILINX	获取价格	Field Programmable Gate Array, 23040-Cell, CMOS, PBGA676,
XC4VSX25-10FFG668C	XILINX	获取价格	Field Programmable Gate Array, 2560 CLBs, 1028MHz, 23040-Cell, CMOS, PBGA668, LEAD FREE, F
XC4VSX25-10FFG668CS2	XILINX	获取价格	Field Programmable Gate Array, 1028MHz, 23040-Cell, CMOS, PBGA668,
XC4VSX25-10FFG668I	XILINX	获取价格	Field Programmable Gate Array, 2560 CLBs, 1028MHz, 23040-Cell, CMOS, PBGA668, LEAD FREE, F
XC4VSX25-10FFG668IS2	XILINX	获取价格	Field Programmable Gate Array, 1028MHz, 23040-Cell, CMOS, PBGA668,
XC4VSX25-10FFG676C	XILINX	获取价格	Field Programmable Gate Array, 23040-Cell, CMOS, PBGA676,
XC4VSX25-10FFG676I	XILINX	获取价格	Field Programmable Gate Array, 23040-Cell, CMOS, PBGA676,

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