5秒后页面跳转
捷配首页

Datasheet > XC4VSX35-10FFG668I
XC4VSX35-10FFG668I PDF预览

XC4VSX35-10FFG668I

更新时间： 2024-11-12 20:37:23
品牌 Logo 应用领域
赛灵思 - XILINX 时钟栅可编程逻辑
页数 文件大小 规格书
9页 123K
描述
Field Programmable Gate Array, 3840 CLBs, 1028MHz, 34560-Cell, CMOS, PBGA668, LEAD FREE, FBGA-668

阅读下载

中文翻译

获取价格

XC4VSX35-10FFG668I 技术参数

是否无铅： 不含铅是否Rohs认证： 符合
生命周期：Active零件包装代码：BGA
包装说明：BGA, BGA668,26X26,40针数：668
Reach Compliance Code：not_compliantECCN代码：3A991.D
HTS代码：8542.39.00.01风险等级：1.38
最大时钟频率：1028 MHzJESD-30 代码：S-PBGA-B668
JESD-609代码：e1长度：27 mm
湿度敏感等级：4可配置逻辑块数量：3840
输入次数：448逻辑单元数量：34560
输出次数：448端子数量：668
组织：3840 CLBS封装主体材料：PLASTIC/EPOXY
封装代码：BGA封装等效代码：BGA668,26X26,40
封装形状：SQUARE封装形式：GRID ARRAY
峰值回流温度（摄氏度）：245可编程逻辑类型：FIELD PROGRAMMABLE GATE ARRAY
认证状态：Not Qualified座面最大高度：2.85 mm
子类别：Field Programmable Gate Arrays最大供电电压：1.26 V
最小供电电压：1.14 V标称供电电压：1.2 V
表面贴装：YES技术：CMOS
端子面层：Tin/Silver/Copper (Sn95.5Ag4.0Cu0.5)端子形式：BALL
端子节距：1 mm端子位置：BOTTOM
处于峰值回流温度下的最长时间：30宽度：27 mm
Base Number Matches：1

XC4VSX35-10FFG668I 数据手册

 浏览型号XC4VSX35-10FFG668I的Datasheet PDF文件第2页浏览型号XC4VSX35-10FFG668I的Datasheet PDF文件第3页浏览型号XC4VSX35-10FFG668I的Datasheet PDF文件第4页浏览型号XC4VSX35-10FFG668I的Datasheet PDF文件第5页浏览型号XC4VSX35-10FFG668I的Datasheet PDF文件第6页浏览型号XC4VSX35-10FFG668I的Datasheet PDF文件第7页 
`
0
R
Virtex-4 Family Overview  
0
0
DS112 (v3.1) August 30, 2010  
Product Specification  
General Description  
Combining Advanced Silicon Modular Block (ASMBL™) architecture with a wide variety of flexible features, the Virtex®-4  
family from Xilinx greatly enhances programmable logic design capabilities, making it a powerful alternative to ASIC  
technology. Virtex-4 FPGAs comprise three platform families—LX, FX, and SX—offering multiple feature choices and  
combinations to address all complex applications. The wide array of Virtex-4 FPGA hard-IP core blocks includes the  
PowerPC® processors (with a new APU interface), tri-mode Ethernet MACs, 622 Mb/s to 6.5 Gb/s serial transceivers,  
dedicated DSP slices, high-speed clock management circuitry, and source-synchronous interface blocks. The basic Virtex-4  
FPGA building blocks are enhancements of those found in the popular Virtex, Virtex-E, Virtex-II, Virtex-II Pro, and  
Virtex-II Pro X product families, so previous-generation designs are upward compatible. Virtex-4 devices are produced on a  
state-of-the-art 90 nm copper process using 300 mm (12-inch) wafer technology.  
Summary of Virtex-4 Family Features  
•
Three Families — LX/SX/FX  
•
SelectIO™ Technology  
-
-
Virtex-4 LX: High-performance logic applications solution  
Virtex-4 SX: High-performance solution for digital signal  
processing (DSP) applications  
Virtex-4 FX: High-performance, full-featured solution for  
embedded platform applications  
-
-
-
-
1.5V to 3.3V I/O operation  
Built-in ChipSync™ source-synchronous technology  
Digitally controlled impedance (DCI) active termination  
Fine grained I/O banking (configuration in one bank)  
-
•
•
•
•
•
Flexible Logic Resources  
•
•
•
Xesium™ Clock Technology  
Secure Chip AES Bitstream Encryption  
90 nm Copper CMOS Process  
1.2V Core Voltage  
Flip-Chip Packaging including Pb-Free Package  
Choices  
-
-
-
Digital clock manager (DCM) blocks  
Additional phase-matched clock dividers (PMCD)  
Differential global clocks  
XtremeDSP™ Slice  
-
-
-
18 x 18, two’s complement, signed Multiplier  
Optional pipeline stages  
Built-in Accumulator (48-bit) and Adder/Subtracter  
•
•
RocketIO™ 622 Mb/s to 6.5 Gb/s Multi-Gigabit  
Transceiver (MGT) [FX only]  
Smart RAM Memory Hierarchy  
-
IBM PowerPC RISC Processor Core [FX only]  
Distributed RAM  
-
Dual-port 18-Kbit RAM blocks  
-
-
PowerPC 405 (PPC405) Core  
Auxiliary Processor Unit Interface (User Coprocessor)  
·
·
Optional pipeline stages  
Optional programmable FIFO logic automatically  
remaps RAM signals as FIFO signals  
•
Multiple Tri-Mode Ethernet MACs [FX only]  
-
High-speed memory interface supports DDR and DDR-2  
SDRAM, QDR-II, and RLDRAM-II.  
Table 1: Virtex-4 FPGA Family Members  
(1)  
Block RAM  
Max  
Configurable Logic Blocks (CLBs)  
Max  
PowerPC  
Processor Ethernet Transceiver  
RocketIO  
Total Max  
I/O User  
Banks I/O  
(3)  
Array  
Logic  
Cells  
Distributed XtremeDSP 18 Kb  
Slices RAM (Kb)  
Block  
Slices(2) Blocks RAM (Kb)  
Blocks  
N/A  
N/A  
N/A  
N/A  
N/A  
N/A  
N/A  
N/A  
MACs  
N/A  
N/A  
N/A  
N/A  
N/A  
N/A  
N/A  
N/A  
Blocks  
N/A  
N/A  
N/A  
N/A  
N/A  
N/A  
N/A  
N/A  
Device  
DCMs PMCDs  
Row x Col  
32  
48  
64  
64  
80  
96  
96  
96  
XC4VLX15  
XC4VLX25  
XC4VLX40  
XC4VLX60  
XC4VLX80  
64 x 24  
96 x 28  
13,824 6,144  
24,192 10,752  
96  
168  
288  
416  
560  
768  
1056  
1392  
48  
72  
864  
4
8
0
4
4
4
8
8
8
8
9
320  
448  
640  
640  
768  
960  
960  
960  
1,296  
1,728  
2,880  
3,600  
4,320  
5,184  
6,048  
11  
13  
13  
15  
17  
17  
17  
128 x 36 41,472 18,432  
128 x 52 59,904 26,624  
160 x 56 80,640 35,840  
96  
8
160  
200  
240  
288  
336  
8
12  
12  
12  
12  
XC4VLX100 192 x 64 110,592 49,152  
XC4VLX160 192 x 88 152,064 67,584  
XC4VLX200 192 x 116 200,448 89,088  
© Copyright 2004–2010 Xilinx, Inc. XILINX, the Xilinx logo, Virtex, Spartan, ISE, and other designated brands included herein are trademarks of Xilinx in the United States and  
other countries. The PowerPC name and logo are registered trademarks of IBM Corp. and used under license. All other trademarks are the property of their respective owners.  
DS112 (v3.1) August 30, 2010  
www.xilinx.com  
Product Specification  
1
 
1234567...9

中文翻译

下载PDF

XC4VSX35-10FFG668I 替代型号

型号 品牌 替代类型 描述 数据表
XC4VSX35-10FFG668C XILINX

完全替代

 Field Programmable Gate Array, 3840 CLBs, 1028MHz, 34560-Cell, CMOS, PBGA668, LEAD FREE, F
XC4VSX35-11FFG668C XILINX

完全替代

 Field Programmable Gate Array, 3840 CLBs, 1205MHz, 34560-Cell, CMOS, PBGA668, LEAD FREE, F

与XC4VSX35-10FFG668I相关器件

型号 品牌 获取价格 描述 数据表
XC4VSX35-10FFG668IS2 XILINX

获取价格

 		Field Programmable Gate Array, 1028MHz, 34560-Cell, CMOS, PBGA668,
XC4VSX35-10FFG676I XILINX

获取价格

 		Field Programmable Gate Array, 34560-Cell, CMOS, PBGA676,
XC4VSX35-11FF668CS2 XILINX

获取价格

 		Field Programmable Gate Array, 1205MHz, 34560-Cell, CMOS, PBGA668,
XC4VSX35-11FF668I XILINX

获取价格

 		Field Programmable Gate Array, 3840 CLBs, 1205MHz, 34560-Cell, CMOS, PBGA668, FBGA-668
XC4VSX35-11FF668IS2 XILINX

获取价格

 		Field Programmable Gate Array, 1205MHz, 34560-Cell, CMOS, PBGA668,
XC4VSX35-11FFG668C XILINX

获取价格

 		Field Programmable Gate Array, 3840 CLBs, 1205MHz, 34560-Cell, CMOS, PBGA668, LEAD FREE, F
XC4VSX35-11FFG668CS2 XILINX

获取价格

 		Field Programmable Gate Array, 3840 CLBs, 1205MHz, 34560-Cell, CMOS, PBGA668,
XC4VSX35-11FFG668I XILINX

获取价格

 		Field Programmable Gate Array, 3840 CLBs, 1205MHz, 34560-Cell, CMOS, PBGA668, LEAD FREE, F
XC4VSX35-11FFG676C XILINX

获取价格

 		Field Programmable Gate Array, 34560-Cell, CMOS, PBGA676,
XC4VSX35-12FF668CS2 XILINX

获取价格

 		Field Programmable Gate Array, 1205MHz, 34560-Cell, CMOS, PBGA668,

与XC4VSX35-10FFG668I相关文章

您还可以找


热门产品
PCB打样/小批量
铝基板
BOM智能配单
PCBA制造
钣金
精密CNC
模具注塑
薄膜开关
精选活动
PCBA打样特惠
四六层板品质升级
铝基板品质升级
一体化电子制造
DFM下载
服务支持
企业认证
产品展示
工厂展示
工艺能力
积分商城
关于捷配
捷配简介
企业文化
公司动态
人才招聘
联系我们
帮助中心
下单流程
付款流程
开票流程
常见问题
全球PCB制造服务专线 400-613-0088

工作时间：9:00-21:00

CEO邮箱：ceo@jiepei.com

投诉邮箱：tousu@jiepei.com

捷配网-微信公众号 微信公众号
捷配网-微信公众号 抖音公众号
资质认证：
合作快递：
支付方式：
Copyright © 2024 Jiepei.com Inc. All Rights Reserved. 版权所有:杭州捷配信息科技有限公司 浙公网安备 33010502006866号 浙ICP备10014259号-119 营业执照ICP证