XC4000, XC4000A, XC4000H
Logic Cell Array Families
Product Description
Description
Features
The XC4000 families of Field-Programmable Gate Arrays
(FPGAs) provide the benefits of custom CMOS VLSI, while
avoiding the initial cost, time delay, and inherent risk of a
conventional masked gate array.
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Third Generation Field-Programmable Gate Arrays
– Abundant flip-flops
– Flexible function generators
– On-chip ultra-fast RAM
– Dedicated high-speed carry-propagation circuit
– Wide edge decoders
– Hierarchy of interconnect lines
– Internal 3-state bus capability
– Eight global low-skew clock or signal distribution
network
The XC4000 families provide a regular, flexible, program-
mable architecture of Configurable Logic Blocks (CLBs),
interconnected by a powerful hierarchy of versatile routing
resources, and surrounded by a perimeter of program-
mable Input/Output Blocks (IOBs).
XC4000-familydeviceshavegenerousroutingresourcesto
accommodate the most complex interconnect patterns.
XC4000A devices have reduced sets of routing resources,
sufficient for their smaller size. XC4000H high I/O devices
maintain the same routing resources and CLB structure as
the XC4000 family, while nearly doubling the available I/O.
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•
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Flexible Array Architecture
– Programmable logic blocks and I/O blocks
– Programmable interconnects and wide decoders
Sub-micron CMOS Process
– High-speed logic and Interconnect
– Low power consumption
The devices are customized by loading configuration data
intotheinternalmemorycells.TheFPGAcaneitheractively
read its configuration data out of external serial or byte-
parallel PROM (master modes), or the configuration data
can be written into the FPGA (slave and peripheral modes).
Systems-Oriented Features
– IEEE 1149.1-compatible boundary-scan logic support
– Programmable output slew rate
– Programmable input pull-up or pull-down resistors
– 12-mA sink current per output (XC4000 family)
– 24-mA sink current per output (XC4000A and
XC4000H families)
The XC4000 families are supported by powerful and so-
phisticated software, covering every aspect of design: from
schematic entry, to simulation, to automatic block place-
ment and routing of interconnects, and finally the creation
of the configuration bit stream.
•
•
Configured by Loading Binary File
– Unlimited reprogrammability
– Six programming modes
Since Xilinx FPGAs can be reprogrammed an unlimited
number of times, they can be used in innovative designs
where hardware is changed dynamically, or where hard-
waremustbeadaptedtodifferentuserapplications.FPGAs
are ideal for shortening the design and development cycle,
but they also offer a cost-effective solution for production
rates well beyond 1000 systems per month.
XACT Development System runs on ’386/’486-type PC,
NEC PC, Apollo, Sun-4, and Hewlett-Packard 700
series
– Interfaces to popular design environments like
Viewlogic, Mentor Graphics and OrCAD
– Fully automatic partitioning, placement and routing
– Interactive design editor for design optimization
– 288 macros, 34 hard macros, RAM/ROM compiler
Table 1. The XC4000 Families of Field-Programmable Gate Arrays
Device
XC4002A 4003/3A 4003H 4004A 4005/5A 4005H 4006
4008 4010/10D 4013/13D 4020
4025
Appr. Gate Count
CLB Matrix
Number of CLBs
Number of Flip-Flops
2,000
8 x 8
64
256
24
3,000
3,000
4,000
5,000
5,000
6,000
8,000
10,000
13,000 20,000 25,000
24 x 24 28 x 28 32 x 32
10 x 10 10 x 10 12 x 12 14 x 14 14 x 14 16 x 16 18 x 18 20 x 20
100
360
30
100
200
30
144
480
36
196
616
42
196
392
42
256
768
48
324
936
54
400
1,120
60
576
1,536
72
784
2,016
84
1,024
2,560
96
Max Decode Inputs
(per side)
Max RAM Bits
Number of IOBs
2,048
64
3,200
80
3,200
160
4,608
96
6,272
112
6,272
192
8,192
128
10,368 12,800* 18,432* 25,088 32,768
144 160 192 224 256
*XC4010D and XC4013D have no RAM
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