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XA Spartan-3A Automotive
FPGA Family Data Sheet
DS681 (v1.1) February 3, 2009
Product Specification
Summary
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LVDS, RSDS, mini-LVDS, HSTL/SSTL differential I/O
with integrated differential termination resistors
Enhanced Double Data Rate (DDR) support
DDR/DDR2 SDRAM support up to 266 Mb/s
Fully compliant 32-/64-bit, 33 MHz PCI™ technology
support
The Xilinx Automotive (XA) Spartan -3A family of FPGAs
solves the design challenges in most high-volume,
cost-sensitive, I/O-intensive automotive electronics
applications. The four-member family offers densities
ranging from 200,000 to 1.4 million system gates, as shown
in Table 1.
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Abundant, flexible logic resources
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Densities up to 25,344 logic cells, including optional shift
register or distributed RAM support
Introduction
XA devices are available in both extended-temperature
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Efficient wide multiplexers, wide logic
Fast look-ahead carry logic
Enhanced 18 x 18 multipliers with optional pipeline
IEEE 1149.1/1532 JTAG programming/debug port
Q-Grade (–40°C to +125°C T ) and I-Grade (–40°C to
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+100°C T ) and are qualified to the industry recognized
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AEC-Q100 standard.
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Hierarchical SelectRAM™ memory architecture
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Up to 576 Kbits of fast block RAM with byte write enables
for processor applications
Up to 176 Kbits of efficient distributed RAM
The XA Spartan-3A family builds on the success of the
earlier XA Spartan-3E and XA Spartan-3 FPGA families by
increasing the amount of I/O per logic, significantly reducing
the cost per I/O. New features improve system performance
and reduce the cost of configuration. These XA Spartan-3A
family enhancements, combined with proven 90 nm process
technology, deliver more functionality and bandwidth per
dollar than ever before, setting the new standard in the
programmable logic industry.
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Up to eight Digital Clock Managers (DCMs)
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Clock skew elimination (delay locked loop)
Frequency synthesis, multiplication, division
High-resolution phase shifting
Wide frequency range (5 MHz to over 320 MHz)
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Eight low-skew global clock networks, eight additional
clocks per half device, plus abundant low-skew routing
Configuration interface to industry-standard PROMs
Because of their exceptionally low cost, XA Spartan-3A
FPGAs are ideally suited to a wide range of automotive
electronics applications, including infotainment, driver
information, and driver assistance modules.
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Low-cost, space-saving SPI serial Flash PROM
x8 or x8/x16 parallel NOR Flash PROM
Unique Device DNA identifier for design authentication
®
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Complete Xilinx ISE and WebPACK™ software
support plus Spartan-3A Starter Kit
The XA Spartan-3A family is a superior alternative to mask
programmed ASICs. FPGAs avoid the high initial mask set
costs and lengthy development cycles, while also permitting
design upgrades in the field with no hardware replacement
necessary because of its inherent programmability, an
impossibility with conventional ASICs and ASSPs with their
inflexible architecture.
MicroBlaze™ and PicoBlaze™ embedded processor
cores
BGA packaging, Pb-free ONLY
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Common footprints support easy density migration
Refer to the Spartan-3A FPGA Family Data Sheet (DS529)
for a full product description, AC and DC specifications, and
package pinout descriptions. Any values shown specifically
in this XA Spartan-3A Automotive FPGA Family data sheet
override those shown in DS529.
Features
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Very low cost, high-performance logic solution for
high-volume, cost-conscious applications
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Dual-range V
supply simplifies 3.3V-only design
CCAUX
For information regarding reliability qualification, refer to
RPT103 (Xilinx Spartan-3A Family Automotive Qualification
Report) and RPT070 (Spartan-3A Commercial Qualification
Report).
Suspend, Hibernate modes reduce system power
Multi-voltage, multi-standard SelectIO™ interface pins
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Up to 375 I/O pins or 165 differential signal pairs
LVCMOS, LVTTL, HSTL, and SSTL single-ended I/O
3.3V, 2.5V, 1.8V, 1.5V, and 1.2V signaling
Selectable output drive, up to 24 mA per pin
QUIETIO standard reduces I/O switching noise
Full 3.3V ± 10% compatibility and hot swap compliance
640+ Mb/s data transfer rate per differential I/O
© 2008–2009 Xilinx, Inc. XILINX, the Xilinx logo, Virtex, Spartan, ISE, and other designated brands included herein are trademarks of Xilinx in the United States and other
countries. PCI, PCIe, and PCI Express are trademarks of PCI-SIG and used under license. All other trademarks are the property of their respective owners.
DS681 (v1.1) February 3, 2009
www.xilinx.com
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Product Specification
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