X4643, X4645
®
64K, 8K x 8 Bit
Data Sheet
March 29, 2005
FN8123.0
DESCRIPTION
CPU Supervisor with 64K EEPROM
The X4643/5 combines four popular functions, Power-
on Reset Control, Watchdog Timer, Supply Voltage
Supervision, and Serial EEPROM Memory in one pack-
age. This combination lowers system cost, reduces
board space requirements, and increases reliability.
FEATURES
• Selectable watchdog timer
• Low V detection and reset assertion
CC
—Four standard reset threshold voltages
—Adjust low V reset threshold voltage using
CC
Applying power to the device activates the power-on
reset circuit which holds RESET/RESET active for a
period of time. This allows the power supply and oscilla-
tor to stabilize before the processor can execute code.
special programming sequence
—Reset signal valid to V = 1V
CC
• Low power CMOS
—<20µA max standby current, watchdog on
—<1µA standby current, watchdog off
—3mA active current
• 64Kbits of EEPROM
—64-byte page write mode
—Self-timed write cycle
—5ms write cycle time (typical)
• Built-in inadvertent write protection
—Power-up/power-down protection circuitry
• 400kHz 2-wire interface
• 2.7V to 5.5V power supply operation
• Available packages
The Watchdog Timer provides an independent protec-
tion mechanism for microcontrollers. When the micro-
controller fails to restart a timer within a selectable time
out interval, the device activates the RESET/RESET
signal. The user selects the interval from three preset
values. Once selected, the interval does not change,
even after cycling the power.
The device’s low V
detection circuitry protects the
CC
user’s system from low voltage conditions, resetting
the system when V falls below the set minimum
CC
V
trip point. RESET/RESET is asserted until V
CC
CC
—8-lead SOIC
—8-lead TSSOP
returns to proper operating level and stabilizes. Four
industry standard V thresholds are available,
TRIP
however, Intersil’s unique circuits allow the threshold
to be reprogrammed to meet custom requirements or
to fine-tune the threshold for applications requiring
higher precision.
BLOCK DIAGRAM
Watchdog Transition
Detector
Watchdog
Timer Reset
WP
Protect Logic
RESET (X4643/5)
RESET (X4645)
Data
Register
SDA
Status
Register
EEPROM Array
Command
Reset &
Watchdog
Timebase
SCL
Decode &
Control
Logic
S0
S1
VCC Threshold
Reset Logic
Power-on and
Low Voltage
Reset
+
-
VCC
VTRIP
Generation
CAUTION: These devices are sensitive to electrostatic discharge; follow proper IC Handling Procedures.
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Copyright Intersil Americas Inc. 2005. All Rights Reserved
1
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