X4C105
®
4K, NOVRAM/EEPROM
Data Sheet
March 18, 2005
FN8124.0
DESCRIPTION
CPU Supervisor with NOVRAM and
Output Ports
The low voltage X4C105 combines several functions
into one device. The first is a 2-wire, 4Kbit serial
EEPROM memory with write protection. A Write Pro-
tect (WP) pin provides hardware protection for the
upper half of this memory against inadvertent writes.
FEATURES
• 4Kbit serial EEPROM
—400kHz serial interface speed
—16-byte page write mode
• One nibble NOVRAM
—120ns NOVRAM access speed
—AUTOSTORE
A one nibble NOVRAM is provided and occupies a sin-
gle location. This allows access of 4-bits in a single
150ns cycle. This is useful for tracking system opera-
tion or process status. The NOVRAM memory is com-
pletely isolated from the serial memory section.
—Direct/bus access of NOVRAM bits
• Four output ports
• Operates at 3.3V ± 10%
A low voltage detect circuit activates a RESET pin
• Low voltage reset when V < 3V
when V
drops below 3V. This signal also blocks
CC
CC
—3% accurate thresholds available
—Output signal shows low voltage condition
—Activates NOVRAM AUTOSTORE
—Internal block on EEPROM operation
• Max EEPROM/NOVRAM nonvolatile write cycle:
5ms
new read or write operations and initiates a NOVRAM
AUTOSTORE. The AUTOSTORE operation is pow-
ered by an external capacitor to ensure that the value
in the NOVRAM is always maintained in the event of a
power failure.
The four NOVRAM bits also appear on four separate
output pins to allow continuous control of external cir-
cuitry, such as ASICs.
• High reliability
—1,000,000 endurance cycles
—Guaranteed data retention: 100 years
• 20-lead TSSOP package
Intersil EEPROMs are designed and tested for appli-
cations requiring extended endurance. Inherent data
retention is greater than 100 years.
BLOCK DIAGRAM
WP
Write Control Logic
O0
HV Generation
EEPROM
Memory
Output
Buffers
and
Timing and Control
O1
O2
O3
Latches
Static RAM
Memory
4Kbits
SCL
SDA
S1
Command
D0
D1
D2
D3
Decode
and
EEPROM
Array
I/O
Buffers
Control
Logic
S2
Control
Logic
and
CE
OE
WE
Y Decoder
Data Register
Timing
CAP
VCC
VSS
Low Voltage Detect
Power-on Reset
Voltage
Monitor
Supply
RESET
CAUTION: These devices are sensitive to electrostatic discharge; follow proper IC Handling Procedures.
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