WS512K32BV-XXXE
512Kx32 3.3V SRAM MODULE PRELIMINARY*
FEATURES
■ Access Times of 15†, 17, 20ns
■ MIL-STD-883 Compliant Devices Available
■ Low Voltage Operation
■ Commercial, Industrial and Military Temperature Ranges
■ 3.3 Volt Power Supply
■ BiCMOS
■ TTL Compatible Inputs and Outputs
■ Packaging
■ Built-in Decoupling Caps and Multiple Ground Pins for Low
• 66-pin, PGA Type, 1.385 inch square Hermetic Ceramic HIP
(Package 402)
Noise Operation
■ Weight
• 68 lead, Hermetic CQFP (G2), 22mm (0.880 inch) square
(Package 500). Designed to fit JEDEC 68 lead 0.990" CQFJ
footprint
WS512K32BV-XG2XE - 8 grams typical
WS512K32NBV-XH2XE - 13 grams typical
■ Organized as 512Kx32; User Configurable as 1Mx16 or 2Mx8
■ Radiation Tolerant with Epitaxial Layer Die
*
This data sheet describes a product under development, not fully
characterized, and is subject to change without notice.
† This speed is Advanced information.
4
PIN CONFIGURATION FOR WS512K32NBV-XH2XE
TOP VIEW
PIN DESCRIPTION
1
12
23
34
45
56
I/O0-31 Data Inputs/Outputs
A0-18
WE1-4
CS1-4
OE
Address Inputs
Write Enables
Chip Selects
Output Enable
Power Supply
Ground
I/O
I/O
8
9
WE
2
I/O15
I/O14
I/O13
I/O12
OE
I/O24
I/O25
I/O26
V
CC
I/O31
I/O30
I/O29
I/O28
CS2
CS
4
I/O10
GND
I/O11
WE
4
VCC
A
A
A
A
A
13
14
15
16
17
A
A
6
7
I/O27
GND
NC
A10
A11
A12
VCC
A
A
3
4
5
3
3
A
A
A
0
1
2
Not Connected
A18
NC
BLOCK DIAGRAM
WE1
A
8
9
A
WE1CS1
WE2CS2
WE3CS3
WE4CS4
I/O
I/O
I/O
I/O
7
A
WE
CS
I/O23
I/O22
I/O21
I/O20
OE
0-18
A
I/O
I/O
I/O
0
1
2
CS
NC
I/O
1
6
I/O16
I/O17
I/O18
512K x 8
512K x 8
512K x 8
512K x 8
5
4
GND
I/O19
3
8
8
8
8
11
22
33
44
55
66
I/O16-23
I/O24-31
I/O0-7
I/O8-15
February 1998
1
White Microelectronics • Phoenix, AZ • (602) 437-1520