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W42C32 PDF预览

W42C32

更新时间: 2024-11-04 22:14:47
品牌 Logo 应用领域
赛普拉斯 - CYPRESS /
页数 文件大小 规格书
8页 134K
描述
Spread Spectrum Frequency Timing Generator

W42C32 数据手册

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W42C32-05  
Spread Spectrum Frequency Timing Generator  
Features  
Key Specifications  
• Maximized EMI suppression using Cypress’s Spread  
Spectrum technology  
• Generates a spread spectrum timing signal  
• Reduces measured EMI by as much as 12 dB  
• Integrated loop filter components  
• Requires a single low-cost fundamental crystal (or  
other frequency reference) for proper operation  
• Special spread spectrum control functions  
• Low-power CMOS design  
Cycle-to-Cycle Jitter ....................................................250 ps  
45/55 Duty Cycle.................................... approximately 1.4V  
Selectable Frequency spread  
2 ns rise/fall time 0.4V to 2.0V, 3.3V supply  
2 ns rise/fall time 0.8V to 2.4V, 5.0V supply  
Table 1. Frequency Spread Selection  
W42C32-05  
• Available in 16-pin SOIC package, (300 mil)  
REFOUT  
(MHz)  
CLKOUT  
(MHz)  
VDD  
(V)  
FS2 FS1 FS0  
Overview  
0
0
0
0
0
1
0
1
0
22.1148  
22.1148  
14.7456  
44.2296 ±  
2.5%  
5.0  
5.0  
5.0  
The W42C32 modulates the output of a single PLL in order to  
‘spread’ the bandwidth of a synthesized clock and, more im-  
portantly, decrease the peak amplitudes of its fundamental  
harmonics. Since peak amplitudes are reduced, the radiated  
electromagnetic emissions of the W42C32-05 are significantly  
lower than the typical narrow band signal produced by oscilla-  
tors and most frequency generators. Lowering a signal’s am-  
plitude by increasing its bandwidth is a method of reducing  
EMI called ‘spread spectrum frequency timing generation’.  
This patented technique not only reduces the emissions of the  
primary clock, but also impacts every signal synchronized to it.  
44.2296  
±1.5%  
29.4912 ±  
2.5%  
0
1
1
1
1
1
0
0
1
1
1
0
1
0
1
18.432  
14.318  
18.432 ± 2.5%  
66.66 – 2%  
5.0  
3.3  
3.3  
3.3  
3.3  
Reserved  
14.318  
100 – 2%  
Reserved  
Pin Configuration  
SOIC  
PD#  
X1  
REFOUT  
FS2  
1
2
3
4
5
6
7
8
16  
15  
14  
13  
12  
11  
10  
9
X2  
FS1  
GND  
SSON#  
RESET  
VDD  
AGND  
FS0  
TEST  
CLKOUT  
AVDD  
REFEN#  
Cypress Semiconductor Corporation  
3901 North First Street  
San Jose  
CA 95134  
408-943-2600  
September 28, 1999, rev. **  

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