Datasheet > W311_05

W311_05

更新时间： 2024-11-07 03:17:51

品牌	Logo	应用领域
赛普拉斯 - CYPRESS		双倍数据速率
页数	文件大小	规格书
19页	372K
描述
FTG for VIA⑩ Pro-266 DDR Chipset

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中文翻译

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数据手册

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W311_05 数据手册

W311

FTG for VIA™ Pro-266 DDR Chipset

• Supports Intel^®Celeron^®and Pentium^®III class

Features

processor

• Maximized EMI Suppression using Cypress’s Spread

• Three copies of CPU output

• Nine copies of PCI output

• One 48-MHz output for USB

• One 24-MHz or 48-MHz output for SIO

• Two buffered reference outputs

• Three copies of APIC output

• Supports frequencies up to 200MHz

• SMBus Interface for programming

• Power management control inputs

• Available in 48-pin SSOP

Spectrum Technology

• System frequency synthesizer for VIA Pro-2000

• Programmable clock output frequency with less than 1

MHz increment

• Integrated fail-safe Watchdog Timer for system

recovery

• Automatically switch to HW selected or SW

programmed clock frequency when Watchdog Timer

time-out

• Capable of generate system RESET after a Watchdog

Timer time-out occurs or a change in output frequency

via SMBus interface

Key Specifications

• Support SMBus byte read/write and block read/ write

operations to simplify system BIOS development

CPU Cycle-to-cycle Jitter: ..........................................250 ps

CPU to CPU Output Skew...........................................175 ps

PCI Cycle-to-cycle Jitter:.............................................500 ps

PCI to PCI Output Skew:.............................................500 ps

• Vendor ID and Revision ID support

• Programmable drive strength for CPU and PCI output

clocks

• ProgrammableoutputskewbetweenCPU, AGPandPCI

Block Diagram

Pin Configuration^[1]

Note:

1. Signals marked with * have internal pull-up resistors

Cypress Semiconductor Corporation

•

3901 North First Street

•

San Jose, CA 95134

•

408-943-2600

Document #: 38-07703 Rev. **

Revised March 14, 2005

12 3 4 5 6 7...19

中文翻译

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