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W134

更新时间: 2024-09-19 23:41:23
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描述
Clocks and Buffers

W134 数据手册

 浏览型号W134的Datasheet PDF文件第6页浏览型号W134的Datasheet PDF文件第7页浏览型号W134的Datasheet PDF文件第8页浏览型号W134的Datasheet PDF文件第10页浏览型号W134的Datasheet PDF文件第11页浏览型号W134的Datasheet PDF文件第12页 
W134M/W134S  
Table 13. Operating Conditions  
Parameter  
Description  
Min.  
3.135  
0
Max.  
3.465  
70  
Unit  
V
V
Supply Voltage  
DD  
T
Ambient Operating Temperature  
Refclk Input Cycle Time  
°C  
ns  
A
t
t
10  
-
40  
CYCLE,IN  
J,IN  
[2]  
Input Cycle-to-Cycle Jitter  
250  
60  
ps  
DC  
FM  
Input Duty Cycle over 10,000 Cycles  
40  
30  
--  
%t  
CYCLE  
IN  
IN  
Input Frequency of Modulation  
33  
kHz  
[3]  
PM  
Modulation Index for Triangular Modulation  
Modulation Index for Non-Triangular Modulation  
Phase Detector Input Cycle Time at PclkM & SynclkN  
Initial Phase error at Phase Detector Inputs  
Phase Detector Input Duty Cycle over 10,000 Cycles  
0.6  
%
%
ns  
IN  
[5]  
--  
0.5  
t
t
30  
0.5  
25  
1
100  
0.5  
75  
4
CYCLE,PD  
t
t
ERR,INIT  
CYCLE,PD  
DC  
IN,PD  
CYCLE,PD  
t
Input Slew Rate (measured at 20%-80% of input voltage) for PclkM,  
SynclkN, and Refclk  
V/ns  
I,SR  
[4]  
C
Input Capacitance at PclkM, SynclkN, and Refclk  
-
-
-
7
pF  
pF  
pF  
IN,PD  
[4]  
C  
Input Capacitance matching at PclkM and SynclkN  
0.5  
10  
IN,PD  
C
Input Capacitance at CMOS pins (excluding PclkM, SynclkN, and  
IN,CMOS  
[4]  
Refclk)  
V
V
V
V
V
V
V
V
Input (CMOS) Signal Low Voltage  
Input (CMOS) Signal High Voltage  
Refclk input Low Voltage  
-
0.7  
-
0.3  
VDD  
VDD  
IL  
-
0.3  
-
IH  
V
V
IL,R  
DDIR  
DDIR  
Refclk input High Voltage  
0.7  
-
IH,R  
IL,PD  
IH,PD  
DDIR  
DDIPD  
Input Signal Low Voltage for PD Inputs and StopB  
Input Signal High Voltage for PD Inputs and StopB  
Input Supply Reference for Refclk  
Input Supply Reference for PD Inputs  
0.3  
-
V
V
DDIPD  
0.7  
1.235  
1.235  
DDIPD  
3.465  
2.625  
V
V
Notes:  
2. Refclk jitter measured at VDDIR (nom)/2.  
3. If input modulation is used: input modulation is allowed but not required.  
4. Capacitance measured at Freq=1 MHz, DC bias=0.9V and VAC<100 mV.  
5. The amount of allowed spreading for any non-triangular modulation is determined by the induced downstream tracking skew, which cannot exceed the skew  
generated by the specified 0.6% triangular modulation. Typically, the amount of allowed non-triangular modulation is about 0.5%.  
9
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