VSC9295
Datasheet
Table 36. Revision ID Register Map .........................................................................................................119
Table 37. Revision ID Register Map Signals ............................................................................................119
Table 38. Interrupt Composite States Register Map .................................................................................119
Table 39. Interrupt Composite States Register Map Signals ....................................................................119
Table 40. Software Reset Register Map ...................................................................................................120
Table 41. Software Reset Register Map Signals ......................................................................................120
Table 42. Software Configuration Command Register Map .....................................................................120
Table 43. Software Configuration Command Register Map Signals .........................................................121
Table 44. High-Speed (TFI-5 Data) Signal DC Characteristics ................................................................123
Table 45. LVCMOS DC Characteristics ....................................................................................................124
Table 46. Core Power Supply Voltages and Currents ...............................................................................125
Table 47. CMOS I/O Power Supply Voltages and Currents ......................................................................125
Table 48. High-Speed Interface Power Supply Voltages and Currents .....................................................125
Table 49. CPU Interface Timing Variable Definitions ................................................................................129
Table 50. Overhead Interface Timing Variable Definitions ........................................................................131
Table 51. High-Speed Interface Receiver Side AC Characteristics ..........................................................131
Table 52. Receiver Jitter Tolerance Mask Definitions ...............................................................................132
Table 53. High-Speed Interface Transmitter Side AC Characteristics ......................................................132
Table 54. Reference Clock Jitter Tolerance ..............................................................................................133
Table 55. Recommended Operating Conditions ......................................................................................133
Table 56. Absolute Maximum Ratings ......................................................................................................134
Table 57. Data Traffic Signals ...................................................................................................................137
Table 58. CPU Interface Signals ..............................................................................................................137
Table 59. Frame Synchronization Signals ................................................................................................137
Table 60. Overhead Monitor Interface Signals .........................................................................................137
Table 61. JTAG Interface Signals .............................................................................................................138
Table 62. CMU Signals .............................................................................................................................138
Table 63. Miscellaneous Signals ..............................................................................................................138
Table 64. Test Mode Signals ....................................................................................................................139
Table 65. Core Power ...............................................................................................................................139
Table 66. CMOS I/O Power ......................................................................................................................139
Table 67. High-Speed Interface Power .....................................................................................................139
Table 68. Pins by Number ........................................................................................................................140
Table 69. Thermal Resistances ................................................................................................................155
Table 70. Ordering Information ................................................................................................................157
10 of 157
VMDS-10144 Revision 4.4
April 2009
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