Datasheet > VSC8173UH

VSC8173UH

更新时间： 2024-01-20 02:35:23

品牌	Logo	应用领域
VITESSE		ATM 异步传输模式电信电信集成电路
页数	文件大小	规格书
2页	29K
描述
Mux/Demux, 1-Func, PBGA96, 15 X 15 MM, BGA-96

阅读下载

中文翻译

获取价格

技术参数
数据手册

如果您发现信息不准确，欢迎纠错

VSC8173UH 技术参数

生命周期：	Contact Manufacturer	包装说明：	BGA,
Reach Compliance Code：	compliant	HTS代码：	8542.39.00.01
风险等级：	5.82	JESD-30 代码：	S-PBGA-B96
功能数量：	1	端子数量：	96
封装主体材料：	PLASTIC/EPOXY	封装代码：	BGA
封装形状：	SQUARE	封装形式：	GRID ARRAY
认证状态：	Not Qualified	标称供电电压：	3.3 V
表面贴装：	YES	电信集成电路类型：	ATM/SONET/SDH MUX/DEMUX
端子形式：	BALL	端子位置：	BOTTOM
Base Number Matches：	1

VSC8173UH 数据手册

VITESSE

SEMICONDUCTOR CORPORATION

Product Brief

9.953 Gbit/sec SONET/SDH

16:1 Multiplexer withh Clock Generator

VSC8173

Features

• Bit Order Swap

• 16:1 SONET/SDH Mux with Clock Generator

• Lock Error Detect

• Input FIFO to Simplify Parallel Interface

Timing

• Divide-by-16 and Ref Clock Outputs

• Low Power Dissipation

• Operation at 9.953 to 10.66 Gb/s rates

• LVDS Parallel Data Inputs

• Parallel Data Parity Checking

• Data Polarity Invert

• Single +3.3V Supply

• Integrated PLL Based Clock Generator

• Meets SONET OC-192 and SDH STM-64 Jitter

General Description

The VSC8173 consists of a 16:1 multiplexer and a clock generator for use in SONET STS-192 / SDH

STM-64 systems. The 16:1 multiplexer accepts 16 parallel low voltage differential swing (LVDS) inputs

(D[0:15]+) at a data rate of 622.08 to 666.51 Mb/s. This parallel data stream is then serialized into a 9.953 to

10.66 Gb/s output (DOUT+). The clock generator creates the 9.953 to 10.66 GHz clock signal used to re-time

the transmitted serialized data. The clock generator requires a 622.08 to 666.51 MHz LVDS/PECL reference

clock input (REFCLK+). To ease timing constraints on the parallel interface, a 17 bit wide FIFO is included. A

high speed clock output (COUT+) is provided for jitter measurements and synchronization of the high speed

serial output. A divide-by-16 LVDS clock output (CK16+) is available for use as a clock input to the data

source of the parallel inputs (D[0:15]+). A parity checking of a parity bit (PARITY+) is clocked in with the

16 bit parallel data. To assist in monitoring device operation a Loss of Lock (LOL) alarm and internal tempera-

ture diode are included. The device is packaged in a 100 pin thermally enhanced Quad Flat Pack (PQFP) and a

96 ball, Ball Grid Array (BGA).

VSC8173 Block Diagram

9.953

10.7 Gb/s

Data

and

Parity

Data

and

Parity

Optical

Electronics

FIFO

Data Stream

Processing

Mux

DIV-BY

Data Clock

622/666 MHz

CMU

G52314-0, Rev. 1.0

5/11/00

VITESSE SEMICONDUCTOR CORPORATION

741 Calle Plano, Camarillo, CA 93012 • 805/388-3700 • FAX: 805/987-5896

Page 1

中文翻译

下载PDF

与VSC8173UH相关器件

型号	品牌	获取价格	描述	数据表
VSC8174	VITESSE	获取价格	Telecom IC
VSC8174QQ	MICROSEMI	获取价格	Mux/Demux, 1-Func, PQFP100, 14 X 14 MM, THERMALLY ENHANCED, PLASTIC, QFP-100
VSC8174QQ	VITESSE	获取价格	Mux/Demux, 1-Func, PQFP100, 14 X 14 MM, THERMALLY ENHANCED, PLASTIC, QFP-100
VSC8174UH	MICROSEMI	获取价格	Mux/Demux, 1-Func, PBGA96, 15 X 15 MM, BGA-96
VSC8174UH	VITESSE	获取价格	Mux/Demux, 1-Func, PBGA96, 15 X 15 MM, BGA-96
VSC8175	VITESSE	获取价格	Telecom IC
VSC8175UT-01	VITESSE	获取价格	ATM/SONET/SDH Mux/Demux,
VSC8184	VITESSE	获取价格	11.5-12.5Gb/s 1:16 Demultiplexer with Clock Recovery
VSC8185	VITESSE	获取价格	Telecom IC,
VSC8185	MICROSEMI	获取价格	Telecom IC,

产品中心

服务支持

精选活动

关于我们

帮助中心

VSC8173UH

VSC8173UH 技术参数

VSC8173UH 数据手册

与VSC8173UH相关器件

与VSC8173UH相关文章

您还可以找

产品中心

服务支持

精选活动

关于我们

帮助中心

VSC8173UH

VSC8173UH 技术参数

VSC8173UH 数据手册

与VSC8173UH相关器件

与VSC8173UH相关文章

您还可以找

您在本页遇到什么问题？