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ꢉꢊ ꢋꢊ ꢌꢍꢎ ꢀꢊ ꢋ ꢏꢍꢎ ꢈꢐ ꢑ ꢅꢇ ꢀ ꢀꢑ ꢐ
SGUS038 − AUGUST 2002
D
Controlled Baseline
− One Assembly/Test Site, One Fabrication
Site
D
D
SMJ320C30 and SMJ320C31 Object Code
Compatible
Fabricated Using Enhanced Performance
Implanted CMOS (EPIC) Technology by
Texas Instruments
D
D
Extended Temperature Performance of
−55°C to 125°C
Enhanced Diminishing Manufacturing
Sources (DMS) Support
D
144-Pin Plastic Quad Flatpack
(PCM Suffix) 5 V
D
D
D
Enhanced Product Change Notification
D
Eight Extended-Precision Registers
†
Qualification Pedigree
D
Two Address Generators With Eight
Auxiliary Registers and Two Auxiliary
Register Arithmetic Units (ARAUs)
High-Performance Floating-Point Digital
Signal Processor (DSP)
SM320C32-50EP (5 V)
− 40-ns Instruction Cycle Time
− 275 MOPS
− 50 MFLOPS
− 25 MIPS
SM320C32-60EP (5 V)
− 33-ns Instruction Cycle Time
− 330 MOPS
D
D
D
Two Low-Power Modes
Two- and Three-Operand Instructions
Parallel Arithmetic Logic Unit (ALU) and
Multiplier Execution in a Single Cycle
D
Block-Repeat Capability
D
Zero-Overhead Loops With Single-Cycle
Branches
− 60 MFLOPS
− 30 MIPS
D
D
Conditional Calls and Returns
Interlocked Instructions for
Multiprocessing Support
D
D
32-Bit High-Performance CPU
16-/32-Bit Integer and 32-/40-Bit
Floating-Point Operations
D
One External Pin, PRGW, That Configures
the External-Program-Memory Width to
16 or 32 Bits
D
32-Bit Instruction Word, 24-Bit Addresses
D
Two 256 × 32-Bit Single-Cycle, Dual-Access
On-Chip RAM Blocks
D
Two Sets of Memory Strobes (STRB0 and
STRB1) and One I/O Strobe (IOSTRB)
Allow Zero-Glue Logic Interface to Two
Banks of Memory and One Bank of External
Peripherals
D
D
Flexible Boot-Program Loader
On-Chip Memory-Mapped Peripherals:
− One Serial Port
− Two 32-Bit Timers
− Two-Channel Direct Memory Access
(DMA) Coprocessor With Configurable
Priorities
D
D
D
Separate Bus-Control Registers for Each
Strobe-Control Wait-State Generation,
External Memory Width, and Data Type Size
STRB0 and STRB1 Memory Strobes Handle
8-, 16-, or 32-Bit External Data Accesses
(Reads and Writes)
D
Enhanced External Memory Interface That
Supports 8-/16-/32-Bit-Wide External RAM
for Data Access and Program Execution
From 16-/32-Bit-Wide External RAM
Multiprocessor Support Through the HOLD
and HOLDA Signals Is Valid for All Strobes
Please be aware that an important notice concerning availability, standard warranty, and use in critical applications of
Texas Instruments semiconductor products and disclaimers thereto appears at the end of this data sheet.
†
Component qualification in accordance with JEDEC and industry standards to ensure reliable operation over an extended temperature range.
This includes, but is not limited to, Highly Accelerated Stress Test (HAST) or biased 85/85, temperature cycle, autoclave or unbiased HAST,
electromigration, bond intermetallic life, and mold compound life. Such qualification testing should not be viewed as justifying use of this
component beyond specified performance and environmental limits.
EPIC is a trademark of Texas Instruments Incorporated.
All trademarks are the property of their respective owners.
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Copyright 2002, Texas Instruments Incorporated
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1
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