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UT1553BRTR-GXC PDF预览

UT1553BRTR-GXC

更新时间: 2024-09-09 22:39:39
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其他 - ETC /
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44页 1147K
描述
Remote Terminal with RAM

UT1553BRTR-GXC 数据手册

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UT1553B RTR Remote Terminal with RAM  
Table I of MIL-STD-883, Method 5004, Class B, also  
Standard Military Drawing available  
FEATURES  
Complete MIL-STD-1553B remote terminal interface  
Available in 68-pin pingrid array package  
1K x 16 of on-chip static RAM for message data,  
completely accessible to host  
INTRODUCTION  
Self-test capability, including continuous loop-back  
The UT1553B RTR is a monolithic CMOS VLSI solution  
totherequirementsofthedual-redundantMIL-STD-1553B  
interface. Designed to reduce cost and space, the RTR  
integrates the remote terminal logic with a user-configured  
1K x 16 static RAM. In addition, the RTR has a flexible  
subsystem interface to permit use with most processors or  
controllers.  
compare  
Programmable memory mapping via pointers for  
efficient use of internal memory, including buffering  
multiple messages per subaddress  
RT-RT Terminal Address Compare  
Command word stored with incoming data for  
enhanced data management  
The RTR provides all protocol, data handling, error  
checking, and memory control functions, as well as  
comprehensive self-test capabilities. The RTR’s memory  
meets all of MIL-STD-1553B message storage needs  
through user-defined memory mapping. This memory-  
mapped architecture allows multiple message buffering at  
User selectable RAM Busy (RBUSY) signal for slow  
or fast processor interfacing  
Full military operating temperature range, -55°C to  
+125°C, screened to the specific test methods listed in  
RTA(4:0)  
REMOTE TERMINAL  
ADDRESS  
MCSA(4:0)  
MODE CODE/  
SUBADDRESS  
CONTROL  
INPUTS  
OUT  
STATUS  
OUTPUTS  
COMMAND  
RECOGNITION  
CONTROL AND  
DECODER  
DECODER  
ERROR LOGIC  
IN  
1K X 16 RAM  
ADDR(9:0)  
OUT  
MUX  
PTR REGISTER  
ENCODER  
IN  
12MHz  
RESET  
DATA(15:0)  
2MHz  
Figure 1. UT1553B RTR Functional Block Diagram  
RTR-1  

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