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UR5595G-S08-R PDF预览

UR5595G-S08-R

更新时间: 2024-11-26 08:22:11
品牌 Logo 应用领域
友顺 - UTC 总线通信稳压器驱动程序和接口接口集成电路光电二极管双倍数据速率
页数 文件大小 规格书
12页 290K
描述
DDR TERMINATION REGULATOR

UR5595G-S08-R 技术参数

是否Rohs认证:符合生命周期:Active
零件包装代码:SOIC包装说明:HALOGEN FREE, SOP-8
针数:8Reach Compliance Code:compliant
ECCN代码:EAR99HTS代码:8542.39.00.01
风险等级:5.04Is Samacsys:N
接口集成电路类型:BUS TERMINATOR SUPPORT CIRCUITJESD-30 代码:R-PDSO-G8
长度:4.92 mm功能数量:1
端子数量:8最高工作温度:125 °C
最低工作温度:封装主体材料:PLASTIC/EPOXY
封装代码:SOP封装形状:RECTANGULAR
封装形式:SMALL OUTLINE峰值回流温度(摄氏度):NOT SPECIFIED
认证状态:Not Qualified座面最大高度:1.96 mm
标称供电电压:2.5 V表面贴装:YES
技术:CMOS温度等级:OTHER
端子形式:GULL WING端子节距:1.27 mm
端子位置:DUAL处于峰值回流温度下的最长时间:NOT SPECIFIED
宽度:3.95 mmBase Number Matches:1

UR5595G-S08-R 数据手册

 浏览型号UR5595G-S08-R的Datasheet PDF文件第2页浏览型号UR5595G-S08-R的Datasheet PDF文件第3页浏览型号UR5595G-S08-R的Datasheet PDF文件第4页浏览型号UR5595G-S08-R的Datasheet PDF文件第5页浏览型号UR5595G-S08-R的Datasheet PDF文件第6页浏览型号UR5595G-S08-R的Datasheet PDF文件第7页 
UNISONIC TECHNOLOGIES CO., LTD  
UR5595  
CMOS IC  
DDR TERMINATION  
REGULATOR  
„
DESCRIPTION  
The UTC UR5595 is a linear bus termination regulator  
designed to meet JEDEC SSTL-2 and SSTL-3 (Stub Series  
Terminated Logic) specifications for termination of DDR-SDRAM.  
The device contains a high-speed operational amplifier to provide  
excellent response to the load transients, and can deliver 1.5A  
continuous current and transient peaks up to 3A in the application  
as required for DDR-SDRAM termination.  
With an independent VSENSE pin, the UR5595 can provide  
superior load regulation. The UR5595 provides a VREF output as  
the reference for the application of the chipset and DIMMs.  
Lead-free:  
Halogen-free: UR5595G  
UR5595L  
The output, VTT, is capable of sinking and sourcing current  
while regulating the output voltage equal to VDDQ/2. The output  
stage has been designed to maintain excellent load regulation and  
with fast response time to minimum the transition preventing  
shoot-through. The UTC UR5595 also incorporates two distinct  
power rails that separates the analog circuitry (AVIN) from the  
power output stage (PVIN). This power rail split can be utilized to  
reduce the internal power dissipation. And this also permits UTC  
UR5595 to provide a termination solution for DDRII SDRAM.  
„
FEATURES  
* Power regulating with driving and sinking capability  
* Low output voltage offset  
* No external resistors required  
* Low external component count  
* Linear topology  
* Low cost and easy to use  
* Thermal shutdown protection  
„
ORDERING INFORMATION  
Ordering Number  
Package  
Packing  
Tape Reel  
Normal  
Lead Free  
Halogen Free  
UR5595G-S08-R  
UR5595G-SH2-R  
UR5595-S08-R  
UR5595-SH2-R  
UR5595L-S08-R  
UR5595L-SH2-R  
SOP-8  
HSOP-8  
Tape Reel  
www.unisonic.com.tw  
Copyright © 2009 Unisonic Technologies Co., Ltd  
1 of 12  
QW-R502-062.B  

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