UR5595G-SH2-R

更新时间： 2024-11-26 08:22:11

品牌	Logo	应用领域
友顺 - UTC		稳压器双倍数据速率
页数	文件大小	规格书
12页	290K
描述
DDR TERMINATION REGULATOR

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UR5595G-SH2-R 数据手册

UNISONIC TECHNOLOGIES CO., LTD

UR5595

CMOS IC

DDR TERMINATION

REGULATOR

DESCRIPTION

The UTC UR5595 is a linear bus termination regulator

designed to meet JEDEC SSTL-2 and SSTL-3 (Stub Series

Terminated Logic) specifications for termination of DDR-SDRAM.

The device contains a high-speed operational amplifier to provide

excellent response to the load transients, and can deliver 1.5A

continuous current and transient peaks up to 3A in the application

as required for DDR-SDRAM termination.

With an independent V_SENSEpin, the UR5595 can provide

superior load regulation. The UR5595 provides a V_REFoutput as

the reference for the application of the chipset and DIMMs.

Lead-free:

Halogen-free: UR5595G

UR5595L

The output, V_TT, is capable of sinking and sourcing current

while regulating the output voltage equal to V_DDQ/2. The output

stage has been designed to maintain excellent load regulation and

with fast response time to minimum the transition preventing

shoot-through. The UTC UR5595 also incorporates two distinct

power rails that separates the analog circuitry (AVIN) from the

power output stage (PVIN). This power rail split can be utilized to

reduce the internal power dissipation. And this also permits UTC

UR5595 to provide a termination solution for DDRII SDRAM.

FEATURES

* Power regulating with driving and sinking capability

* Low output voltage offset

* No external resistors required

* Low external component count

* Linear topology

* Low cost and easy to use

* Thermal shutdown protection

ORDERING INFORMATION

Ordering Number

Package

Packing

Tape Reel

Normal

Lead Free

Halogen Free

UR5595G-S08-R

UR5595G-SH2-R

UR5595-S08-R

UR5595-SH2-R

UR5595L-S08-R

UR5595L-SH2-R

SOP-8

HSOP-8

Tape Reel

www.unisonic.com.tw

1 of 12

QW-R502-062.B

12 3 4 5 6 7...12

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