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UPSD3212 PDF预览

UPSD3212

更新时间: 2024-09-15 22:17:15
品牌 Logo 应用领域
意法半导体 - STMICROELECTRONICS 闪存静态存储器微控制器
页数 文件大小 规格书
152页 1492K
描述
Flash Programmable System Devices with 8032 Microcontroller Core and 16Kbit SRAM

UPSD3212 数据手册

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UPSD3212C  
UPSD3212CV  
Flash Programmable System Devices  
with 8032 Microcontroller Core and 16Kbit SRAM  
FEATURES SUMMARY  
The uPSD321X Devices combine a Flash PSD  
Figure 1. 52-lead, Thin, Quad, Flat Package  
architecture with an 8032 microcontroller core.  
The uPSD321X Devices of Flash PSDs feature  
dual banks of Flash memory, SRAM, general  
purpose I/O and programmable logic, supervi-  
2
sory functions and access via I C, ADC and  
PWM channels, and an on-board 8032 micro-  
controller core, with two UARTs, three 16-bit  
Timer/Counters and two External Interrupts. As  
with other Flash PSD families, the uPSD321X  
Devices are also in-system programmable (ISP)  
via a JTAG ISP interface.  
TQFP52 (T)  
Large 2KByte SRAM with battery back-up  
option  
Dual bank Flash memories  
– 64KByte main Flash memory  
– 16KByte secondary Flash memory  
Content Security  
Figure 2. 80-lead, Thin, Quad, Flat Package  
– Block access to Flash memory  
Programmable Decode PLD for flexible address  
mapping of all memories within 8032 space.  
High-speed clock standard 8032 core (12-cycle)  
2
I C interface for peripheral connections  
5 Pulse Width Modulator (PWM) channels  
Analog-to-Digital Converter (ADC)  
Six I/O ports with up to 46 I/O pins  
3000 gate PLD with 16 macrocells  
Supervisor functions with Watchdog Timer  
In-System Programming (ISP) via JTAG  
Zero-Power Technology  
TQFP80 (U)  
Single Supply Voltage  
– 4.5 to 5.5V  
– 3.0 to 3.6V  
September 2003  
1/152  
Rev. 1.2  

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