Datasheet > UPD65701(352TBGA)

UPD65701(352TBGA)

更新时间： 2024-10-30 20:50:07

品牌	Logo	应用领域
瑞萨 - RENESAS		光电二极管
页数	文件大小	规格书
4页	77K
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UPD65701(352TBGA)

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UPD65701(352TBGA) 技术参数

生命周期：	Obsolete	Reach Compliance Code：	compliant
风险等级：	5.84	Base Number Matches：	1

UPD65701(352TBGA) 数据手册

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ISSP1

Standard Family

ISSPSeries

Features (continued)

Description

The ISSP1 Standard family represents the first generation of NEC Electronics’ Instant

Silicon Solutions Platform™ (ISSP™)—products that have established the reputation of

ISSP as the industry’s premier structured ASIC family for accelerated ROI. Based on NEC

Electronics’ 150 nm (UX4) CMOS process, the ISSP1-STD family implements complex

ASIC designs with global clock frequencies as high as 250 MHz. ISSP delivers close to

cell-based ASIC performance levels and a complex multi-gate (CMG)-based logic fabric

that delivers high performance and low power. The ISSP prefabricated architecture

incorporates clock domains, design-for-test (DFT) circuitry, global routes, and other

resources into the fabric of the chip. This architecture simplifies the design flow and

enables exceptionally fast manufacturing turnaround. Further improving the ROI equa-

tion, NRE costs are as much as an order of magnitude lower than those of cell-based

ASICs. ISSP1-STD is the ideal solution for low- to mid-volume production levels.

Design Performance,

Turnaround Time

Advantage

To improve performance and shorten turnaround, the ISSP prefabricated structure

includes multiple SRAM blocks and high-speed analog phase-locked loops (APLLs)

with phase-shift capability for versatile clock generation. An embedded clock structure

enables design with predictable and minimized clock skew. Since several types of DFT

circuits are embedded in every ISSP1-STD master, there is no danger of functional or

timing resimulations after test insertion. An embedded power mesh means fewer power

integrity issues. Additionally, the architecture provides a large array of complex multi-

gates for implementing custom logic. The use of complex logic elements makes it

possible to optimize transistor sizes for different functions, thus improving custom logic

performance.

With many elements that are traditionally executed in the ASIC design flow embedded

into its architecture, ISSP has a greatly simplified design flow that minimizes design

iterations. The entire base master architecture has been preverified to eliminate signal

integrity issues that can result in development delays. As a result, ISSP1-STD devices

enable a much shorter design cycle than cell-based ASICs. Manufacturing time is

extremely short because only two metal layers must be added to customize an ISSP1-

STD master with a custom logic design.

Block Diagram

Low-Risk Advantage

Advantages

By providing a fast-turn solution with low NRE costs, ISSP1-STD makes it practical to

develop high-performance ASICs for modest production volumes. If volumes need to

increase, the design can migrate easily to an NEC Electronics cell-based product using

the same process technology and based on the same IP and design flow.

• Low overall development costs, engineering resources and mask NRE expenses for

quick ROI

• Built-in DFT circuits, clocks, SRAM, signal integrity assurance and other features that

simplify the design process and boost performance

• Logic structure with optimized transistor sizes to improve design performance

• Mid-volume production capabilities with extremely fast turnaround times

• Predictable flow for layout and turnaround times

• Ability to leverage cell-based IP for easy migration to cell-based ASICs

12 3 4

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与UPD65701(352TBGA)相关器件

型号	品牌	获取价格	描述	数据表
UPD65701(420TBGA)	RENESAS	获取价格	UPD65701(420TBGA)
UPD65702	ETC	获取价格	ISSP Series Pamphlet \| Pamphlet[11/2002]
UPD65702(352TBGA)	RENESAS	获取价格	UPD65702(352TBGA)
UPD65702(420TBGA)	RENESAS	获取价格	UPD65702(420TBGA)
UPD65702(500TBGA)	RENESAS	获取价格	UPD65702(500TBGA)
UPD65702(680TBGA)	RENESAS	获取价格	UPD65702(680TBGA)
UPD65703	ETC	获取价格	ISSP Series Pamphlet \| Pamphlet[11/2002]
UPD65703(500TBGA)	RENESAS	获取价格	UPD65703(500TBGA)
UPD65703(680TBGA)	RENESAS	获取价格	UPD65703(680TBGA)
UPD65704(888ABGA)	RENESAS	获取价格	UPD65704(888ABGA)

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