Datasheet > UPD485505G-25-E2

UPD485505G-25-E2

更新时间： 2024-10-15 06:33:55

品牌	Logo	应用领域
日电电子 - NEC		先进先出芯片光电二极管
页数	文件大小	规格书
24页	278K
描述
5KX8 OTHER FIFO, 18ns, PDSO24, 11.43 MM, PLASTIC, SOP-24

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UPD485505G-25-E2 数据手册

DATA SHEET

MOS INTEGRATED CIRCUIT

µPD485505

LINE BUFFER

5K-WORD BY 8-BIT

Description

The µPD485505 is a 5,048 words by 8 bits high speed FIFO (First In First Out) line buffer. Its CMOS static circuitry

provides high speed access and low power consumption.

The µPD485505 can be used for one line delay and time axis conversion in high speed facsimile machines and

digital copiers.

Moreover, the µPD485505 can execute read and write operations independently on an asynchronous basis. Thus

the µPD485505 is suitable as a buffer for data transfer between units with different transfer rates and as a buffer for

the synchronization of multiple input signals. There are three versions, E, K, P, and L. This data sheet can be applied

to the version P and L. These versions operate with different specifications. Each version is identified with its lot

number (refer to 7. Example of Stamping).

Features

•

5,048 words by 8 bits

Asynchronous read/write operations available

Variable length delay bits; 21 to 5,048 bits (Cycle time: 25 ns)

15 to 5,048 bits (Cycle time: 35 ns)

•

Power supply voltage V^CC= 5.0 V 0.5 V

Suitable for sampling one line of A3 size paper (16 dots/mm)

All input/output TTL compatible

3-state output

Full static operation; data hold time = infinity

Ordering Information

Part Number

µPD485505G-25

µPD485505G-35

µPD485505G-25-A

µPD485505G-35-A

R/W Cycle Time

Package

25 ns

35 ns

25 ns

35 ns

24-pin PLASTIC SOP

(11.43 mm (450))

<R>

Remark Products with -A at the end of the part number are lead-free products.

The information in this document is subject to change without notice. Before using this document, please

confirm that this is the latest version.

Not all products and/or types are available in every country. Please check with an NEC Electronics

sales representative for availability and additional information.

Document No. M10059EJ8V0DS00 (8th edition)

Date Published March 2006 N CP(K)

Printed in Japan

1994, 1996

The mark <R> shows major revised points.

The revised points can be easily searched by copying an "<R>" in the PDF file and specifying it in the "Find what:" field.

12 3 4 5 6 7...24

中文翻译

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与UPD485505G-25-E2相关器件

型号	品牌	获取价格	描述	数据表
UPD485505G-25-E2-A	NEC	获取价格	FIFO, 5KX8, 18ns, Synchronous, CMOS, PDSO24, 11.43 MM, PLASTIC, SOP-24
UPD485505G-27	ETC	获取价格	Field/Frame/Line Memory
UPD485505G-35	NEC	获取价格	LINE BUFFER 5K-WORD BY 8-BIT
UPD485505G-35-A	NEC	获取价格	暂无描述
UPD485505GU-25	ETC	获取价格	Field/Frame/Line Memory
UPD485505GU-35	ETC	获取价格	Field/Frame/Line Memory
UPD485505V-25	ETC	获取价格	Field/Frame/Line Memory
UPD485505V-35	ETC	获取价格	Field/Frame/Line Memory
UPD485506	NEC	获取价格	LINE BUFFER 5K-WORD BY 16-BIT/10K-WORD BY 8-BIT
UPD485506G5-25	ETC	获取价格	Field/Frame/Line Memory

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