Datasheet > UPD4482183GF-A50Y

UPD4482183GF-A50Y

更新时间： 2024-11-06 20:32:27

品牌	Logo	应用领域
瑞萨 - RENESAS		静态存储器内存集成电路
页数	文件大小	规格书
28页	255K
描述
Cache SRAM, 512KX18, 3.1ns, CMOS, PQFP100, 14 X 20 MM, PLASTIC, LQFP-100

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UPD4482183GF-A50Y 技术参数

是否无铅：	含铅	是否Rohs认证：	不符合
生命周期：	Obsolete	零件包装代码：	QFP
包装说明：	LQFP,	针数：	100
Reach Compliance Code：	unknown	ECCN代码：	3A991.B.2.A
HTS代码：	8542.32.00.41	风险等级：	5.92
最长访问时间：	3.1 ns	其他特性：	PIPELINED ARCHITECTURE
JESD-30 代码：	R-PQFP-G100	JESD-609代码：	e0
长度：	20 mm	内存密度：	9437184 bit
内存集成电路类型：	CACHE SRAM	内存宽度：	18
功能数量：	1	端子数量：	100
字数：	524288 words	字数代码：	512000
工作模式：	SYNCHRONOUS	最高工作温度：	85 °C
最低工作温度：	-40 °C	组织：	512KX18
封装主体材料：	PLASTIC/EPOXY	封装代码：	LQFP
封装形状：	RECTANGULAR	封装形式：	FLATPACK, LOW PROFILE
并行/串行：	PARALLEL	峰值回流温度（摄氏度）：	NOT SPECIFIED
认证状态：	Not Qualified	座面最大高度：	1.7 mm
最大供电电压 (Vsup)：	3.465 V	最小供电电压 (Vsup)：	3.135 V
标称供电电压 (Vsup)：	3.3 V	表面贴装：	YES
技术：	CMOS	温度等级：	INDUSTRIAL
端子面层：	TIN LEAD	端子形式：	GULL WING
端子节距：	0.65 mm	端子位置：	QUAD
处于峰值回流温度下的最长时间：	NOT SPECIFIED	宽度：	14 mm
Base Number Matches：	1

UPD4482183GF-A50Y 数据手册

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DATA SHEET

MOS INTEGRATED CIRCUIT

PD4482163, 4482183, 4482323, 4482363

8M-BIT CMOS SYNCHRONOUS FAST SRAM

PIPELINED OPERATION

DOUBLE CYCLE DESELECT

Description

The μPD4482163 is a 524,288-word by 16-bit, the μPD4482183 is a 524,288-word by 18-bit, μPD4482323 is a 262,144-

word by 32-bit and the μPD4482363 is a 262,144-word by 36-bit synchronous static RAM fabricated with advanced CMOS

technology using Full-CMOS six-transistor memory cell.

The μPD4482163, μPD4482183, μPD4482323 and μPD4482363 integrates unique synchronous peripheral circuitry, 2-bit

burst counter and output buffer as well as SRAM core. All input registers are controlled by a positive edge of the single

clock input (CLK).

The μPD4482163, μPD4482183, μPD4482323 and μPD4482363 are suitable for applications which require synchronous

operation, high speed, low voltage, high density and wide bit configuration, such as cache and buffer memory.

ZZ has to be set LOW at the normal operation. When ZZ is set HIGH, the SRAM enters Power Down State (“Sleep”). In

the “Sleep” state, the SRAM internal state is preserved. When ZZ is set LOW again, the SRAM resumes normal operation.

The μPD4482163, μPD4482183, μPD4482323 and μPD4482363 are packaged in 100-pin PLASTIC LQFP with a 1.4 mm

package thickness for high density and low capacitive loading.

Features

• Single 3.3 V power supply

• Synchronous operation

• Operating temperature : T_A= 0 to 70 °C (-A44, -A50, -A60)

T_A= −40 to +85 °C (-A44Y, -A50Y, -A60Y)

• Internally self-timed write control

• Burst read / write : Interleaved burst and linear burst sequence

• Fully registered inputs and outputs for pipelined operation

• Double-Cycle deselect timing

• All registers triggered off positive clock edge

• 3.3 V LVTTL Compatible : All inputs and outputs

• Fast clock access time : 2.8 ns (225 MHz), 3.1 ns (200 MHz), 3.5 ns (167 MHz)

• Asynchronous output enable : /G

• Burst sequence selectable : MODE

• Sleep mode : ZZ (ZZ = Open or Low : Normal operation)

• Separate byte write enable : /BW1 to /BW4, /BWE (μPD4482323, μPD4482363)

/BW1, /BW2, /BWE (μPD4482163, μPD4482183)

Global write enable : /GW

• Three chip enables for easy depth expansion

• Common I/O using three state outputs

The information in this document is subject to change without notice. Before using this document, please

confirm that this is the latest version.

Not all products and/or types are available in every country. Please check with an NEC Electronics

sales representative for availability and additional information.

Document No. M14904EJ4V0DS00 (4th edition)

Date Published February 2006 NS CP(K)

Printed in Japan

The mark shows major revised points.

2000

The mark <R> shows major revised points.

The revised points can be easily searched by copying an "<R>" in the PDF file and specifying it in the "Find what:" field.

12 3 4 5 6 7...28

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与UPD4482183GF-A50Y相关器件

型号	品牌	获取价格	描述	数据表
UPD4482183GF-A60	NEC	获取价格	8M-BIT CMOS SYNCHRONOUS FAST SRAM PIPELINED OPERATION DOUBLE CYCLE DESELECT
UPD4482183GF-A60	RENESAS	获取价格	Cache SRAM, 512KX18, 3.5ns, CMOS, PQFP100, 14 X 20 MM, PLASTIC, LQFP-100
UPD4482183GF-A60Y	NEC	获取价格	8M-BIT CMOS SYNCHRONOUS FAST SRAM PIPELINED OPERATION DOUBLE CYCLE DESELECT
UPD4482183GF-A60Y-A	NEC	获取价格	暂无描述
UPD4482321	NEC	获取价格	8M-BIT CMOS SYNCHRONOUS FAST SRAM FLOW THROUGH OPERATION
UPD4482321GF-A65	NEC	获取价格	8M-BIT CMOS SYNCHRONOUS FAST SRAM FLOW THROUGH OPERATION
UPD4482321GF-A65-A	NEC	获取价格	暂无描述
UPD4482321GF-A65Y	NEC	获取价格	Cache SRAM, 256KX32, 6.5ns, CMOS, PQFP100, 14 X 20 MM, PLASTIC, LQFP-100
UPD4482321GF-A65Y-A	NEC	获取价格	Cache SRAM, 256KX32, 6.5ns, CMOS, PQFP100, 14 X 20 MM, PLASTIC, LQFP-100
UPD4482321GF-A75	NEC	获取价格	8M-BIT CMOS SYNCHRONOUS FAST SRAM FLOW THROUGH OPERATION

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