Datasheet > UPD30111S1-70-3C

UPD30111S1-70-3C

更新时间： 2024-11-13 23:39:51

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MICROPROCESSOR\|32-BIT\|CMOS\|BGA\|224PIN\|PLASTIC

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UPD30111S1-70-3C 数据手册

DATA SHEET

MOS INTEGRATED CIRCUIT

µPD30111

VR4111^TM

64-/32-BIT MICROPROCESSOR

DESCRIPTION

The µPD30111 (V^R4111) is one of NEC's V^RSeries RISC (Reduced Instruction Set Computer) microprocessors

and is a high-performance 64-/32-bit microprocessor employing the MIPS^TMRISC architecture.

The V^R4111 uses the high-performance, super power-saving V^R4110^TMas the CPU core, and has many peripheral

functions such as a DMA controller, software modem interface, serial interface, keyboard interface, IrDA interface,

touch panel interface, real-time clock, A/D converter, and D/A converter. Configured with these functions, the

V^R4111 is suitable for high-speed battery-driven portable information systems. The external memory bus width can

be selected from 32 bits and 16 bits, realizing high-speed data transfer.

Detailed function descriptions are provided in the following user’s manual. Be sure to read it before

designing.

• V^R4111 User's Manual (U13137E)

FEATURES

• Employs 64-bit MIPS architecture

• Conforms to MIPS III instruction set (deleting FPU,

LL, LLD, SC, and SCD instructions)

• Optimized 5-stage pipeline

• DRAM interface and mask ROM interface to support

flash memory

• Keyboard interface and touch panel interface

• 4-channel DMA controller

• Supports MIPS16 instruction set

• Supports high-speed product-sum operation

instructions

• Serial interface (NS16550 compatible)

• IrDA interface for infrared communication

• Software modem interface

• Supports four types of operating modes, enabling

more effective power-consumption management

• Internal maximum operating frequency: 70 MHz

• On-chip clock generator

• A/D and D/A converters to support digital voice I/O

• Supports ISA bus subset

• Power supply voltage: internal 2.3 to 2.7 V, external 3.0

to 3.6 V

• Address space physical: 32 bits

• Package: 224-pin fine-pitch FBGA

virtual:

40 bits

Integrates 32 double entry TLBs

• High-capacity instruction/data separated cache

memories

Instruction: 16 Kbytes

Data:

8 Kbytes

APPLICATIONS

• Battery-driven portable information systems

• Embedded controllers, etc.

ORDERING INFORMATION

Part Number

Package

224-pin fine-pitch BGA (16 × 16 mm)

Internal Maximum Operating Frequency

µPD30111S1-70-3C

70 MHz

The information in this document is subject to change without notice. Before using this document, please

confirm that this is the latest version.

Not all devices/types available in every country. Please check with local NEC representative for

availability and additional information.

Document No. U13211EJ2V0DS00 (2nd edition)

Date Published August 1999 N CP(K)

Printed in Japan

The mark

shows major revised points.

12 3 4 5 6 7...134

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