Datasheet > UPD30122

UPD30122

更新时间： 2024-11-13 23:39:51

品牌	Logo	应用领域
其他 - ETC		微处理器光电二极管
页数	文件大小	规格书
60页	433K
描述
UPD30122(VR4122(TM)) 64/32-Bit Microprocessor Data Sheet \| Data Sheet[12/2002]

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UPD30122 数据手册

DATA SHEET

MOS INTEGRATED CIRCUIT

µPD30122

VR4122^TM

64-/32-BIT MICROPROCESSOR

DESCRIPTION

The µPD30122 (V^R4122) is one of NEC Electronics’ V^RSeries^TMRISC (Reduced Instruction Set Computer)

microprocessors and is a high-performance 64-/32-bit microprocessor employing the MIPS^TMRISC architecture.

The V^R4122 uses the high-performance, super power-saving V^R4120^TMas the CPU core, and has many peripheral

functions such as a DMA controller, serial interface, IrDA interface, and real-time clock. Configured with these

functions, the V^R4122 is suitable for high-speed battery-driven portable information systems. The external memory

bus width can be selected from 32 bits and 16 bits, realizing high-speed data transfer.

Detailed function descriptions are provided in the following user’s manuals. Be sure to read them before

designing.

• V^R4122 User’s Manual (U14327E)

• VR4100 Series^TMArchitecture User’s Manual (U15509E)

FEATURES

• Employs 64-bit MIPS architecture

• Conforms to MIPS III instruction set (deleting FPU,

LL, LLD, SC, and SCD instructions)

• Optimized 5-stage pipeline

• High-capacity instruction/data separated cache

memories

Instruction: 32 KB

Data:

16 KB

• Supports MIPS16 instruction set

• Memory controller (ROM, synchronous DRAM

(SDRAM), and flash memory supported)

• Supports PCI bus subset

• Supports high-speed product-sum operation

instructions

• Supports four types of operating modes, enabling

more effective power-consumption management

• Internal maximum operating frequency: 180/150 MHz

• On-chip clock generator

• 4-channel DMA controller

• Serial interface (NS16550 compatible)

• On-chip clocked serial interface

• IrDA interface for infrared communication

• Debug serial interface

• Address space physical: 32 bits

virtual:

40 bits

• Power supply voltage:

Integrates 32 double-entry TLBs

V^DD1 = 1.8 to 2.0 V (150 MHz model),

1.9 to 2.0 V (180 MHz model)

V^DD3 = 3.0 to 3.6 V

• Package: 224-pin fine-pitch FBGA

APPLICATIONS

• Battery-driven portable information systems

• Embedded controllers, etc.

The information in this document is subject to change without notice. Before using this document, please

confirm that this is the latest version.

Not all products and/or types are available in every country. Please check with an NEC Electronics

sales representative for availability and additional information.

Document No. U15585EJ3V0DS00 (3rd edition)

Date Published December 2002 N CP(K)

Printed in Japan

The mark shows major revised points.

12 3 4 5 6 7...60

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UPD30181AF1-131-GA3	RENESAS	获取价格	UPD30181AF1-131-GA3
UPD30181AF1-131-GA3-A	RENESAS	获取价格	UPD30181AF1-131-GA3-A
UPD30181AF1-131-GA3-A	NEC	获取价格	64-/32-BIT MICROPROCESSOR

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