Datasheet > 微控制器和处理器 > 微处理器> UPD30181AYF1-131-GA3

UPD30181AYF1-131-GA3

更新时间： 2024-11-14 08:23:31

品牌	Logo	应用领域
日电电子 - NEC		微控制器和处理器外围集成电路微处理器
页数	文件大小	规格书
72页	560K
描述
64-/32-BIT MICROPROCESSOR

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技术参数
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UPD30181AYF1-131-GA3 技术参数

是否Rohs认证：	不符合	生命周期：	Obsolete
零件包装代码：	BGA	包装说明：	BGA,
针数：	240	Reach Compliance Code：	compliant
风险等级：	5.81	Is Samacsys：	N
地址总线宽度：	25	位大小：	64
边界扫描：	YES	外部数据总线宽度：	32
格式：	FLOATING POINT	集成缓存：	YES
JESD-30 代码：	S-PBGA-B240	JESD-609代码：	e0
长度：	16 mm	低功率模式：	YES
端子数量：	240	封装主体材料：	PLASTIC/EPOXY
封装代码：	BGA	封装形状：	SQUARE
封装形式：	GRID ARRAY	峰值回流温度（摄氏度）：	NOT SPECIFIED
认证状态：	Not Qualified	速度：	131 MHz
标称供电电压：	2.5 V	表面贴装：	YES
技术：	CMOS	端子面层：	TIN LEAD
端子形式：	BALL	端子位置：	BOTTOM
处于峰值回流温度下的最长时间：	NOT SPECIFIED	宽度：	16 mm
uPs/uCs/外围集成电路类型：	MICROPROCESSOR, RISC	Base Number Matches：	1

UPD30181AYF1-131-GA3 数据手册

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DATA SHEET

MOS INTEGRATED CIRCUIT

µPD30181A, 30181AY

VR4181A^TM

64-/32-BIT MICROPROCESSOR

DESCRIPTION

The µPD30181A and 30181AY (V^R4181A), which are high-performance 64-/32-bit microprocessors employing the

RISC (reduced instruction set computer) architecture developed by MIPS^TM, are products in the V^RSeries^TMof

microprocessors manufactured by NEC.

The V^R4181A includes as its CPU the V^R4120™ core, an ultra-low-power-consumption core featuring cache

memory, a high-speed product-sum operation unit, and a memory management unit. Other on-chip components

include an LCD controller, CompactFlash controller, USB host/function controller, DMA controller, SDRAM controller,

PWM controller, AC97/I²S audio interface, full-duplex asynchronous serial interface, IrDA interface, I²C serial

interface, keyboard interface, touch panel interface, real-time clock, A/D converter, D/A converter, and other

controllers and interfaces required for battery-driven mobile information devices, fixed compact information devices,

car navigation systems, and compact embedded devices.

Detailed function descriptions are provided in the following user’s manuals. Be sure to read them before

designing.

• V^R4181A Hardware User’s Manual (U16049E)

• V^R4100 Series^TMArchitecture User’s Manual (U15509E)

FEATURES

{ V^R4120 core (64-bit RISC core) on chip as CPU

{ Pipeline clock: 131 MHz

{ UMA type LCD controller (supports STN and TFT

panels)

{ Conforms to MIPS III (except for FPU, LL and SC { ExCA register-compatible CompactFlash interface (2

instructions) and MIPS16 instruction sets slots)

{ Supports MACC and DMACC high-speed product-sum { USB host controller (Rev1.1, OHCI Rev1.0)

operation instructions

controller

{ On-chip cache memory

{ USB function (Rev1.1) controller

Capacity includes 8 KB instruction cache and 8 KB { AC97 and I²S audio interfaces (1 channel each)

data cache

{ Clocked serial interface (1 channel)

{ NS16550-compatible serial interface (3 channels)

{ IrDA (SIR) interface (1 channel)

{ Employs a writeback cache

{ Physical addresses: 32 bits

Virtual addresses: 40 bits

{ On-chip 32 double-entry TLB

{ I²C bus interfaces (2 channels, µPD30181AY only)

{ PWM controller (3 channels)

{ Effective power management using four modes: { DMA controller supporting chain mode (4 channels)

Fullspeed, Standby, Suspend, and Hibernate { Keyboard scan interface (supports 8 × 12 key matrix)

{ Employs a high-performance internal system bus (T- { X-Y coordinate auto scan touch panel interface

bus) { On-chip A/D converter and D/A converter

{ DRAM controller supporting 64 Mb, 128 Mb, and 256 { On-chip watchdog timer unit

Mb SDRAMs

{ RTC unit (total of 3 timer and counter channels)

{ External system bus interface supporting ROM, page { On-chip PLL and clock generators

ROM, flash memory, SRAM, ISA devices, IDE (ATA) { Power supplies: 2.5 V for core, 3.3 V for I/O block

devices, and SyncFlash™ memory

{ Package: 240-pin plastic FBGA

The information in this document is subject to change without notice. Before using this document, please

confirm that this is the latest version.

Not all devices/types available in every country. Please check with local NEC representative for

availability and additional information.

Document No. U16277EJ1V0DS00 (1st edition)

Date Published October 2002 N CP(K)

Printed in Japan

The mark

shows major revised points.

2002

1997

12 3 4 5 6 7...72

中文翻译

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与UPD30181AYF1-131-GA3相关器件

型号	品牌	获取价格	描述	数据表
UPD30181AYF1-131-GA3-A	NEC	获取价格	64-/32-BIT MICROPROCESSOR
UPD30181AYF1-131-GA3-A	RENESAS	获取价格	UPD30181AYF1-131-GA3-A
UPD30181GM-66-8ED	NEC	获取价格	64-/32-Bit Microprocessor
UPD301B	MICROCHIP	获取价格	Stand-alone USB Type-Câ¢ Power Delivery 3.0
UPD301B-I	MICROCHIP	获取价格	Stand-alone USB Type-Câ¢ Power Delivery 3.0
UPD301B-IKYX	MICROCHIP	获取价格	Stand-alone USB Type-Câ¢ Power Delivery 3.0
UPD301B-IKYXVAO	MICROCHIP	获取价格	Stand-alone USB Type-Câ¢ Power Delivery 3.0
UPD301BKYX	MICROCHIP	获取价格	Stand-alone USB Type-Câ¢ Power Delivery 3.0
UPD301BT	MICROCHIP	获取价格	Stand-alone USB Type-Câ¢ Power Delivery 3.0
UPD301BT-I	MICROCHIP	获取价格	Stand-alone USB Type-Câ¢ Power Delivery 3.0

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