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UPA103B

更新时间： 2024-02-08 05:11:28
品牌 Logo 应用领域
日电电子 - NEC 晶体晶体管
页数 文件大小 规格书
8页 75K
描述
HIGH FREQUENCY NPN TRANSISTOR ARRAY

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中文翻译

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UPA103B 技术参数

生命周期：Obsolete包装说明：SMALL OUTLINE, R-CDSO-G14
Reach Compliance Code：unknownECCN代码：EAR99
HTS代码：8541.21.00.75风险等级：5.84
最大集电极电流 (IC)：0.04 A基于收集器的最大容量：1.8 pF
集电极-发射极最大电压：6 V配置：COMPLEX
最小直流电流增益 (hFE)：40最高频带：X BAND
JESD-30 代码：R-CDSO-G14元件数量：5
端子数量：14最高工作温度：125 °C
封装主体材料：CERAMIC, METAL-SEALED COFIRED封装形状：RECTANGULAR
封装形式：SMALL OUTLINE极性/信道类型：NPN
认证状态：Not Qualified表面贴装：YES
端子形式：GULL WING端子位置：DUAL
晶体管应用：AMPLIFIER晶体管元件材料：SILICON
标称过渡频率 (fT)：9000 MHzBase Number Matches：1

UPA103B 数据手册

 浏览型号UPA103B的Datasheet PDF文件第2页浏览型号UPA103B的Datasheet PDF文件第3页浏览型号UPA103B的Datasheet PDF文件第4页浏览型号UPA103B的Datasheet PDF文件第5页浏览型号UPA103B的Datasheet PDF文件第6页浏览型号UPA103B的Datasheet PDF文件第7页 
DATA SHEET  
COMPOUND TRANSISTOR  
µPA103  
HIGH FREQUENCY NPN TRANSISTOR ARRAY  
FEATURES  
•
FIVE MONOLITHIC 9 GHz fT TRANSISTORS:  
Two of these use a common emitter pin and can be used as differential amplifiers  
OUTSTANDING hFE LINEARITY  
•
•
TWO PACKAGE OPTIONS:  
µPA103B: Superior thermal dissipation due to studded ceramic package  
µPA103G: Reduced circuit size due to 14-pin plastic SOP package for surface mounting  
DESCRIPTION AND APPLICATIONS  
The µPA103 is a user configurable Silicon bipolar transistor array consisting of a common emitter pair and three  
individual bipolar transistors. It is available in a surface mount 14-pin plastic SOP package and a 14-pin ceramic package.  
Typical applications include: differential amplifiers and oscillators, high speed comparators, advanced cellular phone  
systems, electro-optic and other signal processing up to 1.5 gigabits/second.  
ORDERING INFORMATION  
PART NUMBER  
µPA103B-E1  
µPA103G-E1  
PACKAGE  
14-pin ceramic package  
14-pin plastic SOP (225 mil)  
ABSOLUTE MAXIMUM RATINGS (TA = +25 °C)  
SYMBOLS  
VCBO*  
VCEO*  
VEBO*  
IC*  
PARAMETERS  
UNITS  
RATINGS  
Collector to Base Voltage  
Collector to Emitter Voltage  
Emitter to Base Voltage  
Collector Current  
V
V
15  
6
V
2.5  
40  
mA  
PT  
Power Dissipation  
µPA103B  
mW  
mW  
650  
350  
µPA103G  
TJ  
Junction Temperature  
µPA103B  
°C  
°C  
200  
125  
µPA103G  
TSTG  
Storage Temperature  
µPA103B  
°C  
°C  
–55 to +200  
–55 to +125  
µPA103G  
* Absolute maximum ratings for each transistor.  
Caution electro-static sensitive devices  
The information in this document is subject to change without notice. Before using this document, please  
confirm that this is the latest version.  
Not all devices/types available in every country. Please check with local NEC representative for availability  
and additional information.  
Document No. P10708EJ2V0DS00 (2nd edition)  
Date Published October 1999 N CP(K)  
Printed in Japan  
The mark  
shows major revised points.  
1995, 1999  
©
12345678

中文翻译

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