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UCC5640PW24 PDF预览

UCC5640PW24

更新时间： 2024-11-07 22:26:11
品牌 Logo 应用领域
德州仪器 - TI 总线通信驱动程序和接口接口集成电路光电二极管信息通信管理
页数 文件大小 规格书
10页 170K
描述
Low Voltage Differential LVD SCSI 9 Line Terminator

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中文翻译

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UCC5640PW24 技术参数

是否无铅：不含铅是否Rohs认证：符合
生命周期：Obsolete零件包装代码：TSSOP
包装说明：GREEN, PLASTIC, TSSOP-24针数：24
Reach Compliance Code：unknownECCN代码：EAR99
HTS代码：8542.39.00.01Factory Lead Time：1 week
风险等级：5.4Is Samacsys：N
差分输出：YES接口集成电路类型：SCSI BUS TERMINATOR
JESD-30 代码：R-PDSO-G24长度：7.8 mm
功能数量：1信号线数量：9
端子数量：24最高工作温度：70 °C
最低工作温度：封装主体材料：PLASTIC/EPOXY
封装代码：TSSOP封装等效代码：TSSOP24,.25
封装形状：RECTANGULAR封装形式：SMALL OUTLINE, THIN PROFILE, SHRINK PITCH
峰值回流温度（摄氏度）：NOT SPECIFIED电源：3/5 V
标称上拉电阻：105 Ω认证状态：Not Qualified
座面最大高度：1.2 mm子类别：Bus Terminators
最大供电电压：5.25 V最小供电电压：2.7 V
标称供电电压：3.3 V表面贴装：YES
技术：BICMOS温度等级：COMMERCIAL
端子形式：GULL WING端子节距：0.65 mm
端子位置：DUAL处于峰值回流温度下的最长时间：NOT SPECIFIED
宽度：4.4 mmBase Number Matches：1

UCC5640PW24 数据手册

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SLUS314C – JANUARY 2000 – REVISED JUNE 2003  
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FEATURES  
DESCRIPTION  
D
First LVD only Active Terminator  
The UCC5640 is an active terminator for low voltage  
differential (LVD) SCSI networks. This LVD only design  
allows the user to reach peak bus performance while  
reducing system cost. The device is designed as an  
active Y-terminator to improve the frequency response  
of the LVD bus. Designed with a 1.5-pF channel  
capacitance, the UCC5640 allows for minimal bus  
loading for a maximum number of peripherals. With the  
UCC5640, the designer will be able to comply with the  
Fast-40 SPI-2, Fast-80 SPI-3 and Fast-160 SPI-4  
specifications. The UCC5640 also provides a much  
needed system migration path for ever improving SCSI  
system standards. This device is available in the 24-pin  
TSSOP and 28-pin TSSOP for ease of layout use.  
D
Meets SCSI SPI-2 Ultra2 (Fast-40), SPI-3 Ultra3  
/ Ultra160 (Fast-80) and SPI-4 (Fast-160)  
Ultra320 Standards  
D
D
2.7-V to 5.25-V Operation  
Differential Failsafe Bias  
The UCC5640 is not designed for use in single ended  
(SE) or high voltage differential (HVD) systems.  
BLOCK DIAGRAM  
OPEN CIRCUIT ON POWER OFF  
OR OPEN CIRCUIT IN A  
SOURCE 5– 15mA  
TRMPWR 28  
2.7V to 5.25V  
µ
SINK 200 A MAXIMUM (NOISE LOAD)  
DISABLED TERMINATOR MODE  
REF 1.3V  
12 DIFSENS  
+
1.3V 0.1V  
HIGH POWER  
DIFFERENTIAL  
2.4V > 1.9V  
11  
27 LVD*  
DIFFB  
HIGH IMPEDANCE RECEIVER  
EVEN WITH POWER OFF  
0.7V > 0.5V  
SINGLE  
ENDED  
SOURCE/SINK REGULATOR  
REF 1.25V  
124  
124  
56mV  
52  
52  
–
+
L1–  
L1+  
4
3
56mV  
+
–
µ
10  
A
56mV  
52  
52  
–
+
26 L9–  
25 L9+  
DISCNCT 15  
56mV  
+
–
UDG–98181  
14  
GND  
1
REG  
*28 pin package only  
These devices have limited built-in ESD protection. The leads should be shorted together or the device placed in conductive foam  
during storage or handling to prevent electrostatic damage to the MOS gates.  
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Copyright 2003, Texas Instruments Incorporated  
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ꢡ ꢥ ꢢ ꢡꢚ ꢛꢯ ꢝꢜ ꢠ ꢨꢨ ꢦꢠ ꢞ ꢠ ꢟ ꢥ ꢡ ꢥ ꢞ ꢢ ꢪ  
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中文翻译

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UCC5640PW24 替代型号

型号 品牌 替代类型 描述 数据表
UCC5640PW24TR TI

完全替代

 Low Voltage Differential LVD SCSI 9 Line Terminator

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 		9-LINE 105ohm SCSI BUS TERMINATOR, PDSO24, TSSOP-24
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