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UCC5641PW24TR PDF预览

UCC5641PW24TR

更新时间: 2024-11-08 19:49:47
品牌 Logo 应用领域
德州仪器 - TI 光电二极管接口集成电路
页数 文件大小 规格书
4页 64K
描述
9-LINE 105ohm SCSI BUS TERMINATOR, PDSO24, TSSOP-24

UCC5641PW24TR 技术参数

是否Rohs认证: 不符合生命周期:Obsolete
零件包装代码:TSSOP包装说明:TSSOP, TSSOP14,.25
针数:24Reach Compliance Code:compliant
ECCN代码:EAR99HTS代码:8542.39.00.01
风险等级:5.85差分输出:YES
接口集成电路类型:SCSI BUS TERMINATORJESD-30 代码:R-PDSO-G24
JESD-609代码:e0长度:7.8 mm
湿度敏感等级:2功能数量:1
信号线数量:9端子数量:24
最高工作温度:70 °C最低工作温度:
封装主体材料:PLASTIC/EPOXY封装代码:TSSOP
封装等效代码:TSSOP14,.25封装形状:RECTANGULAR
封装形式:SMALL OUTLINE, THIN PROFILE, SHRINK PITCH峰值回流温度(摄氏度):220
电源:3.3 V标称上拉电阻:105 Ω
认证状态:Not Qualified座面最大高度:1.2 mm
子类别:Bus Terminators最大供电电压:5.25 V
最小供电电压:2.7 V标称供电电压:3.3 V
表面贴装:YES温度等级:COMMERCIAL
端子面层:TIN LEAD端子形式:GULL WING
端子节距:0.65 mm端子位置:DUAL
处于峰值回流温度下的最长时间:NOT SPECIFIED宽度:4.4 mm
Base Number Matches:1

UCC5641PW24TR 数据手册

 浏览型号UCC5641PW24TR的Datasheet PDF文件第2页浏览型号UCC5641PW24TR的Datasheet PDF文件第3页浏览型号UCC5641PW24TR的Datasheet PDF文件第4页 
UCC5641  
Low Voltage Differential (LVD) SCSI 9 Line Terminator  
FEATURES  
DESCRIPTION  
First LVD only Active Terminator  
The UCC5641 is an active terminator for Low Voltage Differential (LVD)  
SCSI networks. This LVD only design allows the user to reach peak bus  
performance while reducing system cost. The device is designed as an  
active Y-terminator to improve the frequency response of the LVD Bus.  
Designed with a 1.5pF channel capacitance, the UCC5641 allows for mini-  
mal bus loading for a maximum number of peripherals. With the  
UCC5641, the designer will be able to comply with the Fast-40 SPI-2 and  
Fast-80 SPI-3 specifications. The UCC5641 also provides a much-needed  
system migration path for ever improving SCSI system standards. This de-  
vice is available in the 24 pin TSSOP and 28 pin TSSOP for ease of lay-  
out use.  
Meets SCSI SPI-2 Ultra2 (Fast-40)  
and Ultra3 / Ultra160 (Fast-80)  
Standards  
2.7V to 5.25V Operation  
Differential Failsafe Bias  
Reversed Disconnect Polarity  
The UCC5641 is not designed for use in single ended or high voltage dif-  
ferential systems.  
BLOCK DIAGRAM  
SOURCE ONLY FROM TRMPWR AND THE ENABLED TERMINATIONS  
OPEN CIRCUIT ON POWER OFF  
OR OPEN CIRCUIT IN A  
DISABLED TERMINATOR MODE  
SOURCE 5–15mA  
SINK 200µA MAXIMUM (NOISE LOAD)  
TRMPWR 28  
2.7V to 5.25V  
REF 1.3V  
12  
DIFSENS  
1.3V 0.1V  
HIGH POWER  
DIFFERENTIAL  
2.4V > 1.9V  
DIFFB  
11  
20k  
27 LVD*  
HIGH IMPEDANCE RECEIVER  
EVEN WITH POWER OFF  
0.1µF  
0.7V > 0.5V  
SINGLE  
ENDED  
SOURCE/SINK REGULATOR  
REF 1.25V  
124  
124  
56mV  
52  
52  
LOW  
FREQUENCY  
FILTER  
+
L1–  
L1+  
4
3
56mV  
50Hz – 60Hz  
+
10µA  
56mV  
52  
52  
+
26 L9–  
25 L9+  
DISCNCT 15  
56mV  
+
GND  
REG  
14  
1
4.7µF  
UDG-99160  
* 28 pin package only  
SLUS397 - JANUARY 2000  

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