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UCC5642MWPG4 PDF预览

UCC5642MWPG4

更新时间： 2024-11-08 19:59:15
品牌 Logo 应用领域
德州仪器 - TI 信息通信管理光电二极管接口集成电路
页数 文件大小 规格书
12页 351K
描述
9-LINE 105ohm SCSI BUS TERMINATOR, PDSO36, GREEN, PLASTIC, SSOP-36

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UCC5642MWPG4 技术参数

是否无铅： 不含铅是否Rohs认证： 符合
生命周期：Obsolete零件包装代码：SSOP
包装说明：SSOP, SOP36,.4,32针数：36
Reach Compliance Code：unknownECCN代码：EAR99
HTS代码：8542.39.00.01风险等级：5.83
差分输出：YES接口集成电路类型：SCSI BUS TERMINATOR
JESD-30 代码：R-PDSO-G36长度：15.385 mm
功能数量：1信号线数量：9
端子数量：36最高工作温度：70 °C
最低工作温度：封装主体材料：PLASTIC/EPOXY
封装代码：SSOP封装等效代码：SOP36,.4,32
封装形状：RECTANGULAR封装形式：SMALL OUTLINE, SHRINK PITCH
峰值回流温度（摄氏度）：NOT SPECIFIED电源：3/5,5 V
标称上拉电阻：105 Ω认证状态：Not Qualified
座面最大高度：2.64 mm子类别：Bus Terminators
最大供电电压：5.25 V最小供电电压：2.7 V
标称供电电压：5 V电源电压1-最大：5.25 V
电源电压1-分钟：4.75 V电源电压1-Nom：5 V
表面贴装：YES技术：BICMOS
温度等级：COMMERCIAL端子形式：GULL WING
端子节距：0.8 mm端子位置：DUAL
处于峰值回流温度下的最长时间：NOT SPECIFIED宽度：7.5 mm
Base Number Matches：1

UCC5642MWPG4 数据手册

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SLUS477 – FEBRUARY 2000 – REVISED DECEMBER 2000  
D
LVD-Only Active Termination  
2.7-V to 5.25-V Operation  
D
Thermal Packaging for Low Junction  
Temperature and Better MTBF  
D
D
D
D
2.85-V Regulator With Load Share  
Differential Failsafe Bias  
D
Meets Ultra2 (SPI-2 LVD), Ultra3/Ultra160  
(SPI-3) and Ultra320 (SPI-4) Standards  
Integrated SPI-3 Mode Change/Filter Delay  
description  
The UCC5642 is an LVD-only small computer system interface (SCSI) terminator that integrates the mode  
change delay function required by the SPI-3 specification. The device senses what types of SCSI drivers are  
present on the bus via the voltage on the DIFFSENS SCSI control line. Single-ended (SE) and high-voltage  
differential (HVD) (EIA485) SCSI drivers are not supported. If the chip detects the presence of an SE or HVD  
SCSI driver, it disconnects itself by switching all terminating resistors off the bus and enters a high-impedance  
state. The terminator can also be commanded to disconnect the terminating resistors with the DISCNCT input.  
Impedance is trimmed for accuracy and maximum effectiveness. Bus lines are biased to a failsafe state to  
ensure signal integrity. A 2.85-V, 300-mA sourcing regulator on chip can share with two other UCC5642 devices  
in a parallel configuration for a 900 mA total.  
The UCC5642 is offered in a 36-pin QSOP (MWP) package for a temperature range of 0°C to 70°C.  
block diagram  
VCC TO 2.85 V REGULATOR  
VOLTAGE  
VCC 24  
3.6 kΩ  
AMPLIFIER  
VOUTM 29  
CURRENT  
AMPLIFIER  
4 kΩ  
1.5 V  
25 VREG  
HPD  
30 SHARE  
31 LVD  
2.1 V  
0.6 V  
LVD  
TTL DRIVERS  
FILTER/  
DELAY  
DIFFB  
5
SE  
DIFFSENS  
REF 1.3 V  
6
DIFSENS  
TRMPWR 12  
ENABLE  
SOURCE/SINK  
REGULATOR  
SW1  
124  
56 mV  
LVD REF  
1.25 V  
52  
52  
10 µA  
−
+
21 L1–  
22 L1+  
56 mV  
DISCNCT  
HS/GND  
7
8
+
–
ENABLE  
OTHER  
HS/GND 10  
124  
56 mV  
MODE  
SW1  
52  
52  
SWITCHES  
–
+
HS/GND 26  
HS/GND 28  
GND 32  
34 L9–  
33 L9+  
SE  
LVD  
HPD  
DOWN OPEN  
DOWN DOWN  
DOWN OPEN  
56 mV  
+
–
DISCNCT OPEN OPEN  
11  
REG  
UDG-00158  
Please be aware that an important notice concerning availability, standard warranty, and use in critical applications of  
Texas Instruments semiconductor products and disclaimers thereto appears at the end of this data sheet.  
Copyright 2000, Texas Instruments Incorporated  
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1
POST OFFICE BOX 655303 • DALLAS, TEXAS 75265  
1234567...12

中文翻译

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