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UCC5631A

更新时间: 2024-11-08 12:47:15
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德州仪器 - TI /
页数 文件大小 规格书
6页 65K
描述
Multimode SCSI 9 Line Terminator

UCC5631A 数据手册

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UCC5631A  
Multimode SCSI 9 Line Terminator  
FEATURES  
DESCRIPTION  
Auto Selection Single Ended (SE) or  
Low Voltage Differential (LVD)  
Termination  
The UCC5631A Multimode SCSI Terminator provides a smooth transition  
into the next generation of the SCSI Parallel Interface (SPI-2). It automati-  
cally senses the bus, via DIFFB, and switches the termination to either sin-  
gle ended (SE) or low voltage differential (LVD) SCSI, dependent on which  
type of devices are connected to the bus. The UCC5631A can not be used  
on a HVD, EIA485, differential SCSI bus. If the UCC5631A detects a HVD  
SCSI device, it switches to a high impedance state.  
Meets SCSI-1, SCSI-2, SCSI-3, SPI,  
Ultra (Fast-20), Ultra2 (SPI-2 LVD)  
and Ultra3 Standards  
2.7V to 5.25V Operation  
Differential Failsafe Bias  
The Multimode terminator contains all functions required to terminate and  
auto detect and switch modes for SPI-2 bus architectures. Single Ended  
and Differential impedances and currents are trimmed for maximum effec-  
tiveness. Fail Safe biasing is provided to insure signal integrity. Device/Bus  
type detection circuitry is integrated into the terminator to provide automatic  
switching of termination between single ended and LVD SCSI and a high  
impedance for HVD SCSI. The multimode function provides all the perfor-  
mance analog functions necessary to implement SPI-2 termination in a sin-  
gle monolithic device.  
Thermal packaging for low junction  
temperature and better MTBF  
Master/Slave Input  
Supports Active Negation  
3pF Channel Capacitance  
Reversed Disconnect Polarity  
The UCC5631A is offered in a 36 pin SSOP package, as well as a 48 pin  
LQFP package for a temperature range of 0°C to 70°C.  
BLOCK DIAGRAM  
HIPD LVD  
35 34  
SE  
33  
(NOISE LOAD)  
REF 1.3V  
HIPD  
2.15V  
1.3V  
20 DIFSENS  
DIFFB 21  
LVD  
SE  
–15mA I  
–5mA  
SOURCE  
0.6V  
50µA I  
200µA  
SINK  
19  
MSTR/SLV  
110  
124  
SOURCE/SINK REGULATOR  
SE REF 2.7V  
56mV  
52.5  
52.5  
+
5
4
L1–  
L1+  
LVD REF 1.25V  
56mV  
+
ALL  
SWITCHES  
MODE  
SE GND SWITCH  
SE  
LVD  
UP  
110  
124  
10µA  
DOWN  
OPEN  
OPEN  
HIPD  
56mV  
52.5  
52.5  
ENABLE  
SWITCHES  
+
DISCNCT  
17  
DISCNCT  
32 L9–  
31 L9+  
56mV  
+
TRMPWR 36  
SE GND SWITCH  
18  
8
9
10  
26  
27  
28  
1
PATENTED CIRCUIT DESIGN  
GND  
REG  
HS/GND  
UDG-99165  
Note: Indicated pinout is for 36 pin SSOP package.  
SLUS443 - OCTOBER 1999  

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