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UCC5519PWPR PDF预览

UCC5519PWPR

更新时间: 2024-11-08 19:59:39
品牌 Logo 应用领域
德州仪器 - TI 光电二极管接口集成电路
页数 文件大小 规格书
10页 162K
描述
9-LINE 105ohm SCSI BUS TERMINATOR, PDSO28, PLASTIC, MO-153, TSSOP-28

UCC5519PWPR 技术参数

是否Rohs认证: 符合生命周期:Obsolete
零件包装代码:TSSOP包装说明:HTSSOP, TSSOP28,.25
针数:28Reach Compliance Code:unknown
ECCN代码:EAR99HTS代码:8542.39.00.01
Factory Lead Time:1 week风险等级:5.69
差分输出:YES接口集成电路类型:SCSI BUS TERMINATOR
JESD-30 代码:R-PDSO-G28长度:9.7 mm
功能数量:1信号线数量:9
端子数量:28最高工作温度:70 °C
最低工作温度:封装主体材料:PLASTIC/EPOXY
封装代码:HTSSOP封装等效代码:TSSOP28,.25
封装形状:RECTANGULAR封装形式:SMALL OUTLINE, HEAT SINK/SLUG, THIN PROFILE, SHRINK PITCH
峰值回流温度(摄氏度):NOT SPECIFIED电源:3/5 V
标称上拉电阻:105 Ω认证状态:Not Qualified
座面最大高度:1.2 mm子类别:Bus Terminators
最大供电电压:5.25 V最小供电电压:2.7 V
表面贴装:YES温度等级:COMMERCIAL
端子形式:GULL WING端子节距:0.65 mm
端子位置:DUAL处于峰值回流温度下的最长时间:NOT SPECIFIED
宽度:4.4 mmBase Number Matches:1

UCC5519PWPR 数据手册

 浏览型号UCC5519PWPR的Datasheet PDF文件第2页浏览型号UCC5519PWPR的Datasheet PDF文件第3页浏览型号UCC5519PWPR的Datasheet PDF文件第4页浏览型号UCC5519PWPR的Datasheet PDF文件第5页浏览型号UCC5519PWPR的Datasheet PDF文件第6页浏览型号UCC5519PWPR的Datasheet PDF文件第7页 
SLUS555 – FEBRUARY 2003  
FEATURES  
DESCRIPTION  
D
Meets SCSI–2, Ultra2 (SPI–2), Ultra3/Ultra160  
(SPI–3), and Ultra320 (SPI–4) Standards  
The UCC5519 is a multimode small computer system  
interface (SCSI) terminator that integrates the mode  
change delay function required by the SPI–3  
specification. The device senses what types of SCSI  
drivers are present on the bus via the voltage on the  
DIFFSENS SCSI control line. High-voltage differential  
(HVD) SCSI drivers (EIA485) are not supported. If the  
chip detects the presence of a HVD SCSI device, it  
disconnects itself by switching all terminating resistors  
off the bus and enters a high-impedance state. The  
terminator can also be commanded to disconnect the  
terminating resistors with the DISCNCT input.  
Impedance is trimmed for accuracy and maximum  
effectiveness.  
D
D
D
D
D
2.7-V to 5.25-V Termpwr Operation  
Built in SPI–3 Delay  
3-pF Channel Capacitance  
Pin Compatible with SS–AR7519  
225-mA MIN Source Regulator, Supports SE  
With all 9 Lines Low  
D
Available in a 28-Pin (PWP) TSSOP Package  
Bus lines are biased to a fail-safe state to ensure signal  
integrity.  
BLOCK DIAGRAM  
HPD  
2.15 V  
0.6 V  
DIGITAL FILTER  
LVD  
DIFFB  
17  
100 ms TO 300 ms  
SE  
REF 1.3 V  
16 DIFSENS  
SOURCE/SINK  
REGULATORS  
SE REF  
2.7 V  
110  
µ
A
1.05  
52  
52  
LVD REF  
1.25 V  
3
2
L1–  
L1+  
125  
µ
A
10  
µ
1.05  
1.05  
A
DISCNCT  
13  
110  
µ
A
OTHER  
SWITCHES  
MODE  
SE  
SW1  
UP  
52  
52  
24 L9–  
25 L9+  
125  
TRMPWR  
2.7 V to 5.25 V  
UP  
28  
27  
LVD  
DOWN DOWN  
TRMPWR  
2.7 V to 5.25 V  
HVD  
OPEN  
OPEN  
OPEN  
DISCNCT OPEN  
UDG–03017  
µ
1.05  
A
1
14  
22  
6
REG  
GND  
HS/GND  
These devices have limited built-in ESD protection. The leads should be shorted together or the device placed in conductive foam  
during storage or handling to prevent electrostatic damage to the MOS gates.  
ꢊꢤ  
Copyright 2003, Texas Instruments Incorporated  
ꢠ ꢤ ꢡ ꢠꢙ ꢚꢮ ꢜꢛ ꢟ ꢧꢧ ꢥꢟ ꢝ ꢟ ꢞ ꢤ ꢠ ꢤ ꢝ ꢡ ꢩ  
1
www.ti.com  

UCC5519PWPR 替代型号

型号 品牌 替代类型 描述 数据表
UCC5672PWPTRG4 TI

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