Datasheet > UCC5606Z

UCC5606Z

更新时间： 2024-11-07 23:39:07

品牌	Logo	应用领域
其他 - ETC		/
页数	文件大小	规格书
5页	406K
描述
Terminator

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数据手册

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UCC5606Z 数据手册

UCC5606

9-Line 3-5 Volt SCSI Active Terminator, Reverse Disconnect

FEATURES

DESCRIPTION

•

Complies with SCSI, SCSI-2 and

SCSI-3 Standards

The UCC5606 provides 9 lines of active termination for a SCSI (Small

Computer Systems Interface) parallel bus. The SCSI standard recom-

mends active termination at both ends of the cable segment.

•

2.7V to 7V Operation

The UCC5606 is ideal for high performance 3.3V SCSI systems. The key

features contributing to such low operating voltage are the 0.1V drop out

regulator and the 2.7V reference. The reduced reference voltage was

necessary to accommodate the lower termination current dictated in the

SCSI-3 specification. During disconnect the supply current is typically

only 1µA, which makes the IC attractive for battery powered systems.

1.8pF Channel Capacitance during

Disconnect

•

1µA Supply Current in Disconnect

Mode

110 Ohm/2.5k Programmable

Termination

The UCC5606 is designed with an ultra low channel capacitance of

1.8pF, which eliminates effects on signal integrity from disconnected ter-

minators at interim points on the bus.

•

Completely Meets SCSI Hot Plugging

-400mA Sourcing Current for

Termination

The UCC5606 can be programmed for either a 110 ohm or 2.5k ohm ter-

mination. The 110 ohm termination is used for standard SCSI bus lengths

and the 2.5k ohm termination is typically used in short bus applications.

When driving the TTL compatible DISCNCT pin directly, the 110 ohm ter-

mination is connected when the DISCNCT pin is driven high, and discon-

nected when low. When the DISCNCT pin is driven through an

impedance between 80k and 150k, the 2.5k ohm termination is con-

nected when the DISCNCT pin is driven high, and disconnected when

•

+400mA Sinking Current for Active

Negation Drivers

•

Trimmed Termination Current to 4%

Trimmed Impedance to 7%

Current Limit and Thermal Shutdown

Protection

driven low.

continued

BLOCK DIAGRAM

UDG-94067-1

Circuit Design Patented

5/95

12 3 4 5

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