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UCC14131-Q1 PDF预览

UCC14131-Q1

更新时间: 2023-09-03 20:38:00
品牌 Logo 应用领域
德州仪器 - TI /
页数 文件大小 规格书
43页 3329K
描述
汽车类、1.5W、12V 至 15V 输入电压、12V 至 15V 输出电压、高密度、> 5kVRMS 隔离式直流/直流模块

UCC14131-Q1 数据手册

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UCC14131-Q1  
ZHCSRY3 APRIL 2023  
www.ti.com.cn  
6 Pin Configuration and Functions  
GNDP  
GNDP  
PG  
1
36  
35  
34  
33  
32  
31  
30  
29  
28  
27  
26  
25  
24  
23  
22  
21  
20  
19  
VEE  
2
VEEA  
FBVDD  
FBVEE  
RLIM  
VEE  
3
ENA  
4
GNDP  
VIN  
5
6
VIN  
7
VEE  
GNDP  
GNDP  
GNDP  
GNDP  
GNDP  
GNDP  
GNDP  
GNDP  
GNDP  
GNDP  
GNDP  
8
VDD  
VDD  
VEE  
9
10  
11  
12  
13  
14  
15  
16  
17  
18  
VEE  
VEE  
VEE  
VEE  
VEE  
VEE  
VEE  
VEE  
6-1. DWN Package, 36-Pin SSOP (Top View)  
6-1. Pin Functions  
PIN  
TYPE (1)  
DESCRIPTION  
NAME  
GNDP  
NO.  
1, 2, 5, 8, 9, 10,  
11, 12, 13, 14,  
15, 16, 17, 18  
Primary-side ground connection for VIN. PIN 1,2, and 5 are analog ground. PIN 8, 9, 10, 11, 12,  
13, 14, 15, 16, 17, and 18 are power ground. Place several vias to copper pours for thermal relief.  
See Layout Guidelines.  
G
Active low power-good open-drain output pin. PG remains low when (VVIN_UVLOP VVIN  
PG  
3
O
VVIN_OVLO); (VVDD_UVP VFBVDD VVDD_OVP); (VVEE_UVP VFBVEE VVEE_OVP); TJ_Primary  
TSHUTPPRIMARY_RISE; and TJ_secondary TSHUTSECONDARY_RISE  
Enable pin. Forcing ENA LOW disables the device. Pull HIGH to enable normal device  
functionality. 5.5-V recommended maximum.  
ENA  
VIN  
4
I
Primary input voltage. PIN 6 is for analog input, and PIN 7 is for power input. For PIN 7, connect  
two 10-µF ceramic capacitor from power VIN PIN 7 to power GNDP PIN 8. Connect a 0.1-µF high-  
frequency bypass ceramic capacitor close to PIN 7 and PIN 8.  
6, 7  
P
19, 20, 21, 22,  
23, 24, 25,26,  
27, 30,31, 36  
Secondary-side reference connection for VDD and COM. The VEE pins are used for the high  
current return paths.  
VEE  
G
Copyright © 2023 Texas Instruments Incorporated  
4
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Product Folder Links: UCC14131-Q1  
English Data Sheet: SLUSF12  
 

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