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UCC15702J PDF预览

UCC15702J

更新时间: 2024-11-26 12:02:19
品牌 Logo 应用领域
德州仪器 - TI 稳压器开关式稳压器或控制器电源电路开关式控制器脉冲信息通信管理
页数 文件大小 规格书
24页 1111K
描述
Advanced Voltage Mode Pulse Width Modulator

UCC15702J 技术参数

生命周期:Obsolete零件包装代码:DIP
包装说明:DIP, DIP14,.3针数:14
Reach Compliance Code:unknownECCN代码:EAR99
HTS代码:8542.39.00.01风险等级:5.84
模拟集成电路 - 其他类型:SWITCHING CONTROLLER控制模式:VOLTAGE-MODE
控制技术:PULSE WIDTH MODULATION最大输入电压:13.5 V
最小输入电压:9.6 V标称输入电压:11 V
JESD-30 代码:R-GDIP-T14长度:19.56 mm
功能数量:1端子数量:14
最高工作温度:125 °C最低工作温度:-55 °C
最大输出电流:1.2 A封装主体材料:CERAMIC, GLASS-SEALED
封装代码:DIP封装等效代码:DIP14,.3
封装形状:RECTANGULAR封装形式:IN-LINE
认证状态:Not Qualified座面最大高度:5.08 mm
子类别:Switching Regulator or Controllers表面贴装:NO
切换器配置:SINGLE最大切换频率:700 kHz
技术:BICMOS温度等级:MILITARY
端子形式:THROUGH-HOLE端子节距:2.54 mm
端子位置:DUAL宽度:7.62 mm
Base Number Matches:1

UCC15702J 数据手册

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application  
INFO  
UCC15701/2  
UCC25701/2  
UCC35701/2  
available  
Advanced Voltage Mode Pulse Width Modulator  
FEATURES  
DESCRIPTION  
700kHz Operation  
The UCC35701/UCC35702 family of pulse width modulators is intended for  
isolated switching power supplies using primary side control. They can be  
used for both off-line applications and DC/DC converter designs such as in  
a distributed power system architecture or as a telecom power source.  
Integrated Oscillator/ Voltage Feed  
Forward Compensation  
Accurate Duty Cycle Limit  
Accurate Volt-second Clamp  
Optocoupler Interface  
The devices feature low startup current, allowing for efficient off-line start-  
ing, yet have sufficient output drive to switch power MOSFETs in excess of  
500kHz.  
Voltage feed forward compensation is operational over a 5:1 input range  
and provides fast and accurate response to input voltage changes over a  
4:1 range. An accurate volt-second clamp and maximum duty cycle limit  
are also featured.  
Fault Counting Shutdown  
Fault Latch off or Automatic Shutdown  
Soft Stop Optimized for Synchronous  
Rectification  
Fault protection is provided by pulse by pulse current limiting as well as the  
ability to latch off after a programmable number of repetitive faults has oc-  
curred.  
1A Peak Gate Drive Output  
130mA Start-up Current  
750mA Operating Current  
Two UVLO options are offered. UCC35701 family has turn-on and turn-off  
thresholds of 13V/9V and UCC35702 family has thresholds of 9.6V/8.8V.  
The UCC35701/2 and the UCC25701/2 are offered in the 14 pin SOIC (D),  
14 pin PDIP (N) or in 14 pin TSSOP (PW) packages. The UCC15701/2 is  
offered in the 14 pin CDIP (J) package.  
TYPICAL APPLICATION DIAGRAM  
V
SUPPLY  
IN  
R1  
R6  
R2  
R7  
VFF  
6
VDD  
3
R3  
7
RT  
VREF  
UCC35701  
CT  
V
C6  
OUT  
10 CT  
C4  
C1  
R4  
9
VSCLAMP  
R8  
C2  
OUT  
ILIM  
4
2
R5  
11 SYNC  
14 SS  
R10  
CS  
CF  
RCS  
1
COUNT  
C3  
R
F
12 VREF  
PGND  
GND  
5
V RETURN  
IN  
R8  
RGND  
8
FB  
13  
R11  
V
OUT  
C5  
R13  
C7  
R12  
C6  
R14  
R15  
UDG-98005-1  
SLUS293C - JANUARY 2000 - REVISED JUNE 2005  

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