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U631H256XSK25 PDF预览

U631H256XSK25

更新时间: 2024-11-07 14:45:23
品牌 Logo 应用领域
赛普拉斯 - CYPRESS 静态存储器内存集成电路
页数 文件大小 规格书
15页 225K
描述
32KX8 NON-VOLATILE SRAM, 25ns, UUC35, DIE-35

U631H256XSK25 技术参数

是否Rohs认证: 不符合生命周期:Obsolete
零件包装代码:DIE包装说明:DIE,
针数:35Reach Compliance Code:unknown
ECCN代码:EAR99HTS代码:8542.32.00.41
风险等级:5.72最长访问时间:25 ns
JESD-30 代码:R-XUUC-N35JESD-609代码:e0
内存密度:262144 bit内存集成电路类型:NON-VOLATILE SRAM
内存宽度:8功能数量:1
端子数量:35字数:32768 words
字数代码:32000工作模式:ASYNCHRONOUS
最高工作温度:85 °C最低工作温度:-40 °C
组织:32KX8封装主体材料:UNSPECIFIED
封装代码:DIE封装形状:RECTANGULAR
封装形式:UNCASED CHIP并行/串行:PARALLEL
峰值回流温度(摄氏度):240认证状态:Not Qualified
最大供电电压 (Vsup):5.5 V最小供电电压 (Vsup):4.5 V
标称供电电压 (Vsup):5 V表面贴装:YES
技术:CMOS温度等级:INDUSTRIAL
端子面层:Tin/Lead (Sn85Pb15)端子形式:NO LEAD
端子位置:UPPER处于峰值回流温度下的最长时间:NOT SPECIFIED
Base Number Matches:1

U631H256XSK25 数据手册

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Obsolete - Not Recommended for New Designs  
U631H256XS  
SoftStore 32K x 8 nvSRAM Die  
Features  
Description  
High-performance CMOS non-  
The U631H256XS has two sepa- data integrity.  
volatile static RAM 32768 x 8 bits rate modes of operation: SRAM Once a STORE cycle is initiated,  
25, 35 and 45 ns Access Times  
10, 15 and 20 ns Output Enable  
Access Times  
Software STORE Initiation  
Automatic STORE Timing  
105 STORE cycles to EEPROM  
10 years data retention in  
EEPROM  
mode and nonvolatile mode. In further input or output are disabled  
SRAM mode, the memory operates until the cycle is completed.  
as an ordinary static RAM. In non- Because a sequence of addresses  
volatile operation, data is transfer- is used for STORE initiation, it is  
red in parallel from SRAM to important that no other read or  
EEPROM or from EEPROM to write accesses intervene in the  
SRAM. In this mode SRAM sequence or the sequence will be  
functions are disabled.  
aborted.  
Automatic RECALL on Power Up The U631H256XS is a fast static Internally, RECALL is a two step  
Software RECALL Initiation  
Unlimited RECALL cycles from  
EEPROM  
RAM (25, 35, 45 ns), with a nonvo- procedure. First, the SRAM data is  
latile electrically erasable PROM cleared and second, the nonvola-  
(EEPROM) element incorporated tile information is transferred into  
in each static memory cell. The the SRAM cells.  
SRAM can be read and written an The RECALL operation in no way  
unlimited number of times, while alters the data in the EEPROM  
independent nonvolatile data resi- cells. The nonvolatile data can be  
des in EEPROM. Data transfers recalled an unlimited number of  
from the SRAM to the EEPROM times.  
Unlimited Read and Write to  
SRAM  
Single 5 V ± 10 % Operation  
Operating temperature range  
0 to 70 °C  
-40 to 85 °C  
QS 9000 Quality Standard  
ESD protection > 2000 V  
(MIL STD 883C M3015.7-HBM)  
(the STORE operation), or from the  
EEPROM to the SRAM (the The chips are tested with a  
RECALL operation) are initiated restricted wafer probe program  
through software sequences.  
at room temperature only. Unte-  
The U631H256XS combines the sted parameters are marked with  
high performance and ease of use a number sign (#).  
of a fast SRAM with nonvolatile  
Pad Configuration  
Pad Description  
A14  
A13  
W
VCC  
A6  
A7 A12  
A8  
A9  
A5  
Signal Name Signal Description  
A4  
A11  
G
A3  
A0 - A14  
Address Inputs  
Data In/Out  
DQ0 - DQ7  
Chip Enable  
E
Output Enable  
Write Enable  
Power Supply Voltage  
Ground  
G
A2  
A1  
A10  
E
W
VCC  
VSS  
DQ7  
A0  
DQ1 DQ2 VSS VCC DQ3 DQ4 DQ5 DQ6  
DQ0  
March 31, 2006  
STK Control #ML0044  
1
Rev 1.0  

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