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U631H64BDK45G1 PDF预览

U631H64BDK45G1

更新时间: 2024-11-07 03:21:35
品牌 Logo 应用领域
SIMTEK 存储内存集成电路静态存储器光电二极管
页数 文件大小 规格书
13页 132K
描述
SoftStore 8K x 8 nvSRAM

U631H64BDK45G1 技术参数

是否Rohs认证:符合生命周期:Obsolete
包装说明:DIP, DIP28,.3Reach Compliance Code:unknown
ECCN代码:EAR99HTS代码:8542.32.00.41
风险等级:5.32Is Samacsys:N
最长访问时间:45 nsJESD-30 代码:R-PDIP-T28
JESD-609代码:e3长度:34.67 mm
内存密度:65536 bit内存集成电路类型:NON-VOLATILE SRAM
内存宽度:8功能数量:1
端子数量:28字数:8192 words
字数代码:8000工作模式:ASYNCHRONOUS
最高工作温度:85 °C最低工作温度:-40 °C
组织:8KX8封装主体材料:PLASTIC/EPOXY
封装代码:DIP封装等效代码:DIP28,.3
封装形状:RECTANGULAR封装形式:IN-LINE
并行/串行:PARALLEL电源:5 V
认证状态:Not Qualified座面最大高度:4.57 mm
最大待机电流:0.001 A子类别:SRAMs
最大压摆率:0.08 mA最大供电电压 (Vsup):5.5 V
最小供电电压 (Vsup):4.5 V标称供电电压 (Vsup):5 V
表面贴装:NO技术:CMOS
温度等级:INDUSTRIAL端子面层:Matte Tin (Sn)
端子形式:THROUGH-HOLE端子节距:2.54 mm
端子位置:DUAL宽度:7.62 mm
Base Number Matches:1

U631H64BDK45G1 数据手册

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Obsolete - Not Recommended for New Designs  
U631H64  
SoftStore 8K x 8 nvSRAM  
Features  
High-performance CMOS non-  
volatile static RAM 8192 x 8 bits  
25, 35 and 45 ns Access Times  
12, 20 and 25 ns Output Enable  
Access Times  
Software STORE Initiation  
(STORE Cycle Time < 10 ms)  
Automatic STORE Timing  
105 STORE cycles to EEPROM  
10 years data retention in  
EEPROM  
fast SRAM with nonvolatile data  
integrity.  
Once a STORE cycle is initiated,  
Description  
The U631H64 has two separate further input or output are disabled  
modes of operation: SRAM mode until the cycle is completed.  
and nonvolatile mode. In SRAM Because a sequence of addresses  
mode, the memory operates as an is used for STORE initiation, it is  
ordinary static RAM. In nonvolatile important that no other read or  
operation, data is transferred in write accesses intervene in the  
parallel from SRAM to EEPROM or sequence or the sequence will be  
from EEPROM to SRAM. In this aborted.  
Automatic RECALL on Power Up mode SRAM functions are disab- Internally, RECALL is a two step  
Software RECALL Initiation  
(RECALL Cycle Time < 20 μs)  
Unlimited RECALL cycles from  
EEPROM  
led.  
procedure. First, the SRAM data is  
The U631H64 is a fast static RAM cleared and second, the nonvola-  
(25, 35, 45 ns), with a nonvolatile tile information is transferred into  
electrically  
erasable  
PROM the SRAM cells.  
Unlimited Read and Write to  
(EEPROM) element incorporated The RECALL operation in no way  
in each static memory cell. The alters the data in the EEPROM  
SRAM can be read and written an cells. The nonvolatile data can be  
unlimited number of times, while recalled an unlimited number of  
independent nonvolatile data resi- times.  
des in EEPROM. Data transfers  
from the SRAM to the EEPROM  
(the STORE operation), or from the  
EEPROM to the SRAM (the  
RECALL operation) are initiated  
SRAM  
Single 5 V 10 % Operation  
Operating temperature ranges:  
0 to 70 °C  
-40 to 85 °C  
QS 9000 Quality Standard  
ESD characterization according  
MIL STD 883C M3015.7-HBM  
(classification see IC Code  
Numbers)  
through software sequences.  
RoHS compliance and Pb- free  
Packages: PDIP28 (300 mil)  
SOP28 (330 mil)  
The U631H64 combines the high  
performance and ease of use of a  
Pin Configuration  
Pin Description  
28  
27  
26  
25  
24  
23  
22  
21  
20  
19  
18  
17  
16  
15  
1
n.c.  
A12  
A7  
VCC  
W
2
3
n.c.  
A8  
Signal Name Signal Description  
4
A6  
A0 - A12  
Address Inputs  
Data In/Out  
5
A5  
A9  
6
A4  
DQ0 - DQ7  
A11  
G
PDIP  
SOP  
7
A3  
Chip Enable  
E
8
A2  
A10  
E
Output Enable  
Write Enable  
Power Supply Voltage  
Ground  
G
9
A1  
W
10  
11  
12  
13  
14  
A0  
DQ7  
DQ6  
DQ5  
DQ4  
DQ3  
VCC  
VSS  
DQ0  
DQ1  
DQ2  
VSS  
Top View  
March 31, 2006  
STK Control #ML0045  
1
Rev 1.0  

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