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TSB83AA22A PDF预览

TSB83AA22A

更新时间： 2024-09-30 03:26:23
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德州仪器 - TI /
页数 文件大小 规格书
6页 56K
描述
IEEE Std 1394b-2002 Phy and OHCI Link Device

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TSB83AA22A 数据手册

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TSB83AA22A  
www.ti.com  
SLLA255–APRIL 2006  
TSB83AA22A IEEE Std 1394b-2002 Phy and OHCI Link Device  
FEATURES  
•
Low-Jitter, External Crystal Oscillator  
Provides Transmit and Receive Data at  
100/200/400/800 Mbps and Link-Layer  
Controller Clock at 49.152 MHz and 98.304  
MHz  
•
•
•
•
Fully Supports Provisions of IEEE Std  
1394b-2002 Revision 1.33+ at 1-Gigabit  
Signaling Rates  
Fully Supports Provisions of IEEE Std  
1394a-2000 and IEEE Std 1394-1995  
Standards for High-Performance Serial Bus  
•
•
•
Separate Bias (TPBIAS) for Each Port  
Software Device Reset (SWR)  
Fully Interoperable With Firewire™, i.LINK™,  
and SB1394 Implementations of IEEE Std  
1394  
Fail-Safe Circuitry Senses Sudden Loss of  
Power to the Device and Disables the Ports  
Ensure That the TSB83AA22A Does Not Load  
the TPBIAS of Any Connected Device and  
Blocks any Leakage From the Port Back to  
Power Plane.  
Provides Two Fully Backward-Compatible,  
IEEE Std 1394a-2000 Fully Compliant)  
Bilingual IEEE Std 1394b-2002 Cable Ports at  
up to 800 Megabits per Second (Mbps)  
•
•
The TSB83AA22A Has an IEEE Std  
1394a-2000-Compliant Common-Mode Noise  
Filter on Incoming Bias Detect Circuit to Filter  
Out Cross-Talk Noise.  
•
Full IEEE Std 1394a-2000 Support Includes:  
– Connection Debounce  
– Arbitrated Short Reset  
The TSB83AA22A Is Port Programmable to  
Force IEEE Std 1394a-2000 Mode to Allow  
Use of IEEE Std 1394a-2000 Connectors  
(IEEE Std 1394b-2002 Signaling Must Not Be  
Put Across IEEE Std 1394a-2000 Connectors  
or Cables).  
– Multispeed Concatenation  
– Arbitration Acceleration  
– Fly-By Concatenation  
– Port Disable/Suspend/Resume  
•
•
Extended Resume Signaling for Compatibility  
With Legacy DV Devices  
•
•
3.3-V and 5-V PCI Signaling Environments  
Serial-Bus Data Rates of 100 Mbps, 200  
Mbps, 400 Mbps, and 800 Mbps  
Power-Down Features to Conserve Energy in  
Battery-Powered Applications  
•
•
Physical Write Posting of up to Three  
Outstanding Transactions  
•
•
Low-Power Sleep Mode  
Fully Compliant With Open Host Controller  
Interface (OHCI) Requirements  
Serial ROM or Boot ROM Interface Supports  
2-wire Serial EEPROM Devices  
•
•
Cable Power Presence Monitoring  
•
•
33-MHz/32-Bit PCI Interface  
Cable Ports Monitor Line Conditions for  
Active Connection to Remote Node  
Multifunction Terminal (MFUNC Terminal 1):  
– PCI_CLKRUN Protocol per the PCI Mobile  
Design Guide  
•
Register Bits Give Software Control of  
Contender Bit, Power-Class Bits, Link Active  
Control Bit, and IEEE Std 1394a-2000  
Features  
– General-Purpose I/O  
– CYCLEIN/CYCLEOUT for External Cycle  
Timer Control for Customized  
Synchronization  
•
Interoperable With Other 1394 Physical  
Layers (Phy) Using 1.8-V, 3.3-V, and 5-V  
Supplies  
Please be aware that an important notice concerning availability, standard warranty, and use in critical applications of Texas  
Instruments semiconductor products and disclaimers thereto appears at the end of this data sheet.  
Firewire is a trademark of Apple Computer, Inc..  
i.LINK is a trademark of Sony Kabushiki Kaisha TA Sony Corporation..  
PRODUCTION DATA information is current as of publication date.  
Products conform to specifications per the terms of the Texas  
Instruments standard warranty. Production processing does not  
necessarily include testing of all parameters.  
Copyright © 2006, Texas Instruments Incorporated  
123456

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