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TS87C52X2-VLBB PDF预览

TS87C52X2-VLBB

更新时间: 2024-09-20 13:14:55
品牌 Logo 应用领域
爱特美尔 - ATMEL 微控制器
页数 文件大小 规格书
55页 596K
描述
Microcontroller, 8-Bit, OTPROM, 40MHz, CMOS, PQCC44, PLASTIC, LCC-44

TS87C52X2-VLBB 技术参数

是否无铅: 不含铅是否Rohs认证: 符合
生命周期:Obsolete零件包装代码:LCC
包装说明:QCCJ,针数:44
Reach Compliance Code:compliantECCN代码:3A991.A.2
HTS代码:8542.31.00.01风险等级:5.64
具有ADC:NO地址总线宽度:16
位大小:8最大时钟频率:40 MHz
DAC 通道:NODMA 通道:NO
外部数据总线宽度:8JESD-30 代码:S-PQCC-J44
JESD-609代码:e3长度:16.5862 mm
湿度敏感等级:2I/O 线路数量:32
端子数量:44最高工作温度:70 °C
最低工作温度:PWM 通道:NO
封装主体材料:PLASTIC/EPOXY封装代码:QCCJ
封装形状:SQUARE封装形式:CHIP CARRIER
峰值回流温度(摄氏度):245认证状态:Not Qualified
ROM可编程性:OTPROM座面最大高度:4.57 mm
速度:40 MHz最大供电电压:5.5 V
最小供电电压:4.5 V标称供电电压:5 V
表面贴装:YES技术:CMOS
温度等级:COMMERCIAL端子面层:Matte Tin (Sn)
端子形式:J BEND端子节距:1.27 mm
端子位置:QUAD处于峰值回流温度下的最长时间:40
宽度:16.5862 mmuPs/uCs/外围集成电路类型:MICROCONTROLLER
Base Number Matches:1

TS87C52X2-VLBB 数据手册

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Features  
80C52 Compatible  
– 8051 Pin and Instruction Compatible  
– Four 8-bit I/O Ports  
– Three 16-bit Timer/Counters  
– 256 Bytes Scratchpad RAM  
High-speed Architecture  
40 MHz at 5V, 30 MHz at 3V  
X2 Speed Improvement Capability (6 Clocks/Machine Cycle)  
– 30 MHz at 5V, 20 MHz at 3V (Equivalent to 60 MHz at 5V, 40 MHz at 3V)  
Dual Data Pointer  
8-bit  
On-chip ROM/EPROM (8Kbytes)  
Programmable Clock Out and Up/Down Timer/Counter 2  
Asynchronous Port Reset  
Microcontroller  
8 Kbytes  
ROM/OTP,  
ROMless  
Interrupt Structure with  
– 6 Interrupt Sources  
– 4 Level Priority Interrupt System  
Full Duplex Enhanced UART  
– Framing Error Detection  
– Automatic Address Recognition  
Low EMI (Inhibit ALE)  
Power Control Modes  
– Idle Mode  
– Power-down Mode  
– Power-off Flag  
TS80C32X2  
TS87C52X2  
TS80C52X2  
AT80C32X2  
AT80C52X2  
AT87C52X2  
Once Mode (On-chip Emulation)  
Power Supply: 4.5 - 5.5V, 2.7 - 5.5V  
Temperature Ranges: Commercial (0 to 70oC) and Industrial (-40 to 85oC)  
Packages: PDIL40, PLCC44, VQFP44 1.4, PQFP44 (13.9 footprint)  
Description  
TS80C52X2 is high performance CMOS ROM, OTP, EPROM and ROMless versions  
of the 80C51 CMOS single chip 8-bit microcontroller.  
The TS80C52X2 retains all features of the 80C51 with extended ROM/EPROM  
capacity (8 Kbytes), 256 bytes of internal RAM, a 6-source, 4-level interrupt system,  
an on-chip oscilator and three timer/counters.  
In addition, the TS80C52X2 has a dual data pointer, a more versatile serial channel  
that facilitates multiprocessor communication (EUART) and an X2 speed improve-  
ment mechanism.  
The fully static design of the TS80C52X2 allows to reduce system power consumption  
by bringing the clock frequency down to any value, even DC, without loss of data.  
The TS80C52X2 has 2 software-selectable modes of reduced activity for further  
reduction in power consumption. In the idle mode the CPU is frozen while the timers,  
the serial port and the interrupt system are still operating. In the power-down mode the  
RAM is saved and all other functions are inoperative.  
Rev. 4184I–8051–02/08  

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