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TS3DDR3812RUAR

更新时间： 2024-11-22 11:08:11
品牌 Logo 应用领域
德州仪器 - TI 开关双倍数据速率光电二极管
页数 文件大小 规格书
18页 529K
描述
适用于 DDR3 应用的 3.3V、2:1 (SPDT)、12 通道开关 | RUA | 42 | -40 to 85

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TS3DDR3812RUAR 数据手册

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TS3DDR3812  
www.ti.com  
SCDS314A –FEBRUARY 2011–REVISED MARCH 2011  
12-Channel, 1:2 MUX/DEMUX Switch for DDR3 Applications  
Check for Samples: TS3DDR3812  
1
FEATURES  
APPLICATIONS  
•
•
•
•
DDR3 Signal Switching  
•
Compatible with DDR3 SDRAM Standard  
(JESD79-3D)  
DIMM Modules  
•
•
•
•
Wide Bandwidth of 1.675 GHz  
Low Propagation Delay (tpd = 40 ps Typ)  
Low Bit-to-Bit Skew (tsk(o) = 6 ps Max)  
Low and Flat ON-State Resistance  
(rON = 8 Ω Typ)  
Notebook/Desktop PCs  
Servers  
RUA PACKAGE  
(TOP VIEW)  
•
•
Low Input/Output Capacitance  
(CON = 5.6 pF Typ)  
42 41 40 39  
38  
1
2
VCC  
A0  
B2  
Low Crosstalk (XTALK = –43 dB,  
Typ at 250 MHz)  
37 C2  
3
4
36  
A1  
A2  
A3  
A4  
A5  
B3  
•
•
VCC Operating Range from 3 V to 3.6 V  
Rail-to-Rail Switching on Data I/O Ports  
35  
C3  
5
34 B4  
(0 to VCC  
)
6
33  
C4  
•
Separate Switch Control Logic for Upper and  
Lower 6-Channels  
7
32  
B5  
8
31  
C5  
EN  
•
•
Dedicated Enable Logic Supports Hi-Z Mode  
SEL1  
9
GND  
30  
VCC  
B6  
28 C6  
B7  
IOFF Protection Prevents Current Leakage in  
Powered Down State (VCC = 0 V)  
SEL2  
10  
11  
12  
13  
29  
A6  
A7  
A8  
•
ESD Performance Tested Per JESD22  
27  
–
2000 V Human Body Model  
(A114B, Class II)  
26 C7  
25 B8  
A9 14  
–
1000 V Charged Device Model (C101)  
24  
15  
A10  
C8  
•
42-pin RUA Package (9 × 3.5 mm, 0.5 mm  
Pitch)  
16  
17  
23  
A11  
B9  
22  
VCC  
C9  
18 19 20 21  
DESCRIPTION  
The TS3DDR3812 is a 12-channel, 1:2 multiplexer/demultiplexer switch designed for DDR3 applications. It  
operates from a 3 to 3.6 V supply and offers low and flat ON-state resistance as well as low I/O capacitance  
which allow it to achieve a typical bandwidth of 1.675 GHz.  
Channels A0 through A11 are divided into two banks of six bits and are independently controlled via two digital  
inputs called SEL1 and SEL2. These select inputs control the switch position of each 6-bit DDR3 source and  
allow them to be routed to one of two end-points. Alternatively, the switch can be used to connect a single  
endpoint to one of two 6-bit DDR3 sources. For switching 12-bit DDR3 sources, simply connect SEL1 and SEL2  
together externally and control all 12 channels with a single GPIO input. An EN input allows the entire chip to be  
placed into a high-impedance (Hi-Z) state while not in use.  
These characteristics make the TS3DDR3812 an excellent choice for use in memory, analog/digital video, LAN,  
and other high-speed signal switching applications.  
1
Please be aware that an important notice concerning availability, standard warranty, and use in critical applications of Texas  
Instruments semiconductor products and disclaimers thereto appears at the end of this data sheet.  
PRODUCTION DATA information is current as of publication date.  
Copyright © 2011, Texas Instruments Incorporated  
Products conform to specifications per the terms of the Texas  
Instruments standard warranty. Production processing does not  
necessarily include testing of all parameters.  
1234567...18

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