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TRCV012G5 PDF预览

TRCV012G5

更新时间: 2024-09-14 22:19:11
品牌 Logo 应用领域
杰尔 - AGERE 解复用器放大器时钟
页数 文件大小 规格书
28页 460K
描述
TRCV012G5 (2.5 Gbits/s) and TRCV012G7 (2.5 Gbits/s and 2.7 Gbits/s) Limiting Amplifier, Clock Recovery, 1:16 Data Demultiplexer

TRCV012G5 数据手册

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Preliminary Data Sheet  
August 2000  
TRCV012G5 (2.5 Gbits/s) and TRCV012G7 (2.5 Gbits/s and 2.7 Gbits/s)  
Limiting Amplifier, Clock Recovery, 1:16 Data Demultiplexer  
Features  
Applications  
TRCV012G5 supports OC-48/STM-16 data rate  
SONET/SDH line termination equipment  
SONET/SDH add/drop multiplexers  
SONET/SDH cross connects  
TRCV012G7 supports:  
— OC-48/STM-16 data rate  
— RS (255, 239) forward error correction (FEC)  
OC-48/STM-16 data rate  
SONET/SDH test equipment  
Fully-integrated limiting amplifier, clock recovery,  
1:16 data demultiplexer  
Description  
No reference clock required for CDR  
The Lucent Technologies Microelectronics Group  
TRCV012G5 operates at the OC-48/STM-16 data  
rate of 2.5 Gbits/s. The TRCV012G7 device operates  
at either 2.5 Gbits/s or the RS FEC OC-48/STM-16  
data rate of 2.7 Gbits/s. For clarity, this data sheet  
refers to the TRCV012G5 serial data rate as  
2.5 Gbits/s and the parallel data and reference clock  
frequency as 155 MHz. (The precise rates are  
2.48832 Gbits/s and 155.52 MHz.) When using the  
TRCV012G7 at the FEC rate, the 2.5 Gbits/s data  
rate should be interpreted as 2.7 Gbits/s and the par-  
allel and clock frequency should be interpreted as  
166 MHz. (The precise rates are 2.66606 Gbits/s and  
166.62 MHz.)  
2.5 Gbits/s data output and 2.5 GHz recovered  
clock output available for wavelength division  
multiplex (WDM) or regenerator applications  
Programmable limiting amplifier offset  
Programmable data sampling phase  
Additional CML serial data input for system  
loopback  
Parity bit generation  
Analog and digital loss of signal (LOS) indicators  
Optional demultiplexer powerdown mode  
conserves power  
Single 3.3 V supply  
The devices contain a limiting amplifier with 30 dB  
gain, a clock and data recovery PLL with high-speed  
serial clock and data outputs, and a 1:16 demulti-  
plexer with differential PECL data and clock outputs.  
Available in either MBIC 025 BiCMOS technology  
or lower-power MBIC 025 silicon germanium  
BiCMOS technology  
The device provides improved optical receiver perfor-  
mance when used in optically amplified systems due  
to a direct slice adjust input pin and a 6 ps adjust-  
ment capability in the slicing decision time. Both  
devices are available in either BiCMOS or in SiGe  
BiCMOS technology for lower power operation.  
High-speed LVPECL digital I/O  
Jitter tolerance, transfer, and generation compliant  
with the following:  
Telcordia Technologies* GR-253  
— ITU-T G.825  
— ITU-T G.958  
Loss of signal compliant with the following:  
Telcordia Technologies GR-253  
* Telcordia Technologies is a registered trademark of Bell Com-  
munications Research, Inc.  

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